ICS9159-07 Datasheet, PDF (2/9 Pages) Integrated Circuit Systems – Frequency Generator for NexGen™ Nx586 Systems

ICS9159-07
Pin Configuration
28-Pin SOIC
Pin Descriptions
PIN NUMBER PIN NAME
1
X1
2
X2
6,7, 9
CPU(0:2)
3, 11, 23 GND
4, 5, 14 FS(0:2)
8, 26
10
VDD
OE
12
DOZE#
13
15, 16, 18 19,
21, 22, 27
20
BSEL#
BCLK(0:6)
VDDB
17
GNDB
24
DISK
25
KEYBD
28
REF
TYPE
IN
OUT
OUT
PWR
IN
PWR
IN
IN
IN
OUT
PWR
PWR
OUT
OUT
OUT
DESCRIPTION
XTAL or external reference frequency input. This input includes XTAL load
capacitance and feedback bias for a 12 - 16 MHz XTAL. Normally, 14.318 MHz.
XTAL output which includes XTAL load capacitance.
Processor clock outputs which are a multiple of the input reference frequency as
shown in the table below.
Device Ground.
Frequency multiplier select pins. See table below. These inputs have internal pull-
up devices.*
Positive power supply.
Output Enable. All outputs tristate when low.**
Reduces CPU clock frequency to 10 MHz when at a logic low level.*
Synchronous and non-synchronous bus clock selector.* ASYNC=0, SYNC=1
Bus clock outputs are fixed at 2 ¤3 the PCLK frequency.
Power for BUS output buffers.
This ground return path is brought on separately to permit separating the noise
impulses from high output buffers from affecting sensitive internal circuitry.***
Fixed 24 MHz clock (with 14.318 MHz input).
Fixed 12 MHz clock (with 14.318 MHz input).
REF is a buffered copy of the crystal oscillator or reference input clock,
nominally 14.31818 MHz.
* Internally pulled-up.
** External pull-up resistor of 5 to 20 kW recommended due to dynamic coupling of adjacent CPU pins.
*** Ground for bus clock buffers.
2