ICS9148-60 Datasheet, PDF (2/10 Pages) Integrated Circuit Systems – Pentium/ProTM System Clock Chip

ICS9148-60
Pin Descriptions
PIN NUMBER
1
2
3
4
5, 6, 7, 8, 10, 11
6, 9
12
13
14
15
16
17
18
19
20
21, 22
23
24
25
26
27
28
PIN NAME
X1
X2
GND2
PCICLK_F
PCICLK (0:5)
VDD2
VDD3
48MHz
24_48MHz
GND3
SEL100/66.6#
SCLK
SDATA
GND
VDD
CPUCLK (1:0)
VDDL
IOAPIC
VDDL
VDD1
REF0
SEL48#
GND1
TYPE
IN
OUT
PWR
OUT
OUT
PWR
PWR
OUT
OUT
PWR
IN
IN
IN
PWR
PWR
OUT
PWR
OUT
PWR
PWR
OUT
IN
PWR
DESCRIPTION
XTAL_IN 14.318MHz Crystal input, has internal 33pF load cap
and feed back resistor from X2
XTAL_OUT Crystal output, has internal load cap 33pF
Ground for PCI outputs
Free Running PCI output
PCI clock outputs. TTL compatible 3.3V
Power for PCICLK outputs, nominally 3.3V
Poer for 48MHz
Fixed CLK output @ 48MHz
Fixed CLK output; 24MHz if pin 27 =1 at power up, 48MHz if
pin 27=0 at power up.
Ground for 48MHz
Select pin for enabling 100MHz or 66.6MHz
H=100MHz, L=66.6MHz (PCI always synchronous 33.3MHz)
Clock input for I² C input
Data input for I² C input
Ground for CPUCLK (0:1)
Power for PLL core
CPU and Host clock outputs nominally 2.5V
Power for CPU outputs, nominally 2.5V
IOAPIC clock output 14.318MHz.
Power for IOAPIC
Power for REF outputs.
14.318MHz clock .
Output/Latched input at power up. When low, pin 14 is 48MHz
Ground for REF outputs, X1, X2.
2