ICS9148-03 Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for PENTIUM/ProTM

ICS9148 - 03
Pin Descriptions
PIN NUMBER
1
2
PIN NAME
VDD1
REF0
3,9,16,22,27,
33,39,45
4
5
6,14
7
8
10, 11, 12, 13
15
17, 18, 20, 21,
28, 29, 31, 32,
34, 35,37,38
19,30,36
23
24
25
26
40, 41, 43, 44
42
46
47
48
CPU3.3#_2.5^1,2
GND
X1
X2
VDD2
PCICLK_F
FS1^{1 , 2}
PCICLK0
FS2^{1 , 2}
PCICLK(1:4)
PCICLK5
PCI_STOP#¹
SDRAM (0:11)
VDD3
SS_EN#¹
SS_TYPE³
24MHz
MODE^{1 , 2}
48MHz
FS0^{1 , 2}
CPUCLK(0:3)
VDDL2
REF1
CPU_STOP#¹
IOAPIC
VDDL1
TYPE
DESCRIPTION
PWR Ref (0:1), XTAL power supply, nominal 3.3V
OUT 14.318 MHz reference clock.
IN
Indicates whether VDDL2 is 3.3V or 2.5V. High=2.5V CPU, LOW=3.3V
CPU. Latched Input.
PWR Ground
IN
OUT
PWR
OUT
IN
OUT
IN
OUT
OUT
IN
Crystal input, has internal load cap (33pF) and feedback
resistor from X2
Crystal output, nominally 14.318MHz. Has internal load cap (33pF)
Supply for PCICLK_F and PCICLK (0:5), nominal 3.3V
Free running PCI clock
Frequency select pin. Latched Input.
PCI clock output.
Frequency select pin. Latched Input.
PCI clock outputs.
PCI clock output. (In desktop mode, MODE=1)
Halts PCICLK (0:5) clocks at logic 0 level, when input low
(In mobile mode, MODE=0)
OUT SDRAM clock outputs.
PWR
IN
IN
OUT
IN
OUT
IN
OUT
PWR
OUT
IN
OUT
PWR
Supply for SDRAM (0:11), PLL core and 24, 48MHz clocks, nominal
3.3.V
Spread Spectrum Enable. Low =Enable
HIGH = Spread Spectrum down spread. LOW = Spread Spectrum Center
spread. Input has Pulldown to GND
24MHz output clock
Pin 15, pin 46 function select pin, 1=Desktop Mode, 0=Mobile mode.
Latched Input.
48MHz output clock
Frequency select pin. Latched Input.
CPU clock outputs, powered by VDDL2. Low if CPU_STOP#=Low
Supply for CPU (0:3), either 2.5V or 3.3V nominal
14.318 Mhz reference clock.(in Desktop Mode, MODE=1) This REF Output
is the STRONGER buffer for ISA loads.
Halts CPUCLK (0:3) clocks at logic 0 level when input low
(in Mobile Mode, MODE=0)
IOAPIC clock output. 14.318 MHz Powered by VDDL1.
Supply for IOAPIC, either 2.5V or 3.3V nominal
Notes:
1: Internal Pull-up Resistor of 240K to 3.3V on indicated inputs
2: Bidirectional input/output pins, input logic levels are latched at internal power-on-reset. Use 10Kohm resistor
to program logic high to VDD logic low to GND.
3. Internal Pulldown Resistor of 240K to GND on SS_type
2