ICS8701-01 Datasheet, PDF (2/10 Pages) Integrated Circuit Systems – LOW SKEW ÷1, ÷2 CLOCK GENERATOR W/POLARITY CONTROL

Integrated
Circuit
Systems, Inc.
ICS8701-01
LOW SKEW ¸1, ¸2 CLOCK
GENERATOR W/POLARITY CONTROL
TABLE 1. PIN DESCRIPTIONS
Number
Name
2, 44
VDDOC
5, 11
VDDOD
26, 32
VDDOA
35, 41
7, 9, 18,
21, 28, 30,
37, 39, 46,
48
16, 20
25, 27, 29,
31, 33
34, 36, 38,
40, 42
43, 45, 47,
1, 3
4, 6, 8,
10, 12
22
VDDOB
GND
VDDI
QA0, QA1, QA2,
QA3, QA4
QB0, QB1, QB2,
QB3, QB4
QC0, QC1, QC2,
QC3, QC4
QD0, QD1, QD2,
QD3, QD4
LVCMOS_CLK
13
DIV_SELD
14
DIV_SELC
23
DIV_SELB
24
DIV_SELA
17, 19
INV1, INV0
15
nMR/OE
Type
Power
Power
Power
Power
Power
Power
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Pullup
Pullup
Pullup
Pullup
Pullup
Pullup
Pullup
Description
Output Bank C power supply. Connect to 3.3V or 2.5V.
Output Bank D power supply. Connect to 3.3V or 2.5V.
Output Bank C power supply. Connect to 3.3V or 2.5V.
Output Bank B power supply. Connect to 3.3V or 2.5V.
Ground. Connect to ground.
Input power supply. Connect to 3.3V.
Bank A outputs. LVCMOS interface levels. 7Ω typical output impedance.
Bank B outputs. LVCMOS interface levels. 7Ω typical output impedance.
Bank C outputs. LVCMOS interface levels. 7Ω typical output impedance.
Bank D outputs. LVCMOS interface levels. 7Ω typical output impedance.
Clock input. LVCMOS interface levels.
Controls frequency division for bank D outputs. LVCMOS interface levels.
Controls frequency division for bank C outputs. LVCMOS interface levels.
Controls frequency division for bank B outputs. LVCMOS interface levels.
Controls frequency division for bank A outputs. LVCMOS interface levels.
Determines polarity of outputs by banks. LVCMOS interface levels.
Master reset and output enable. Resets non-inverting outputs to LOW. Sets
inverting outputs to HIGH. Enables and disables all outputs. LVCMOS interface
levels.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
CIN
RPULLUP
Input Capacitance
Input Pullup Resistor
CPD
Power Dissipation Capacitance
(per output)
ROUT
Output Impedance
Test Conditions
VDDI, VDDOx = 3.465V
VDDI = 3.465V, VDDOx = 2.625V
Minimum
Typical
51
7
Maximum
Units
pF
KΩ
pF
pF
Ω
TABLE 3. FUNCTION TABLE
Inputs
nMR/OE DIV_SELx
INV1
0
X
X
1
0
0
1
0
0
1
0
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
INV0
X
0
1
0
1
0
1
0
1
BANK A
Hi Z
Inverting
Inverting
Inverting
Inverting
Inverting
Inverting
Inverting
Inverting
BANK B
Hi Z
Non-inverting
Inverting
Inverting
Inverting
Non-inverting
Inverting
Inverting
Inverting
Outputs
BANK C
BANK D
Hi Z
Hi Z
Non-inverting Non-inverting
Non-inverting Non-inverting
Inverting Non-inverting
Inverting
Inverting
Non-inverting Non-inverting
Non-inverting Non-inverting
Inverting Non-inverting
Inverting
Inverting
Qx frequency
zero
fIN/2
fIN/2
fIN/2
fIN/2
fIN
fIN
fIN
fIN
8701-01
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2
REV. A - AUGUST 28, 2000