ICS85357-01 Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – 4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER

Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
1, 14,
17, 20
Name
V_CC
Type
Power
Description
Positive supply pins. Connect to 3.3V.
2
CLK0
Input Pulldown Non-inverting differential clock input.
3
nCLK0
Input
Pullup Inverting differential clock input.
4
CLK1
Input Pulldown Non-inverting differential clock input.
5
nCLK1
Input
Pullup Inverting differential clock input.
6
CLK2
Input Pulldown Non-inverting differential clock input.
7
nCLK2
Input
Pullup Inverting differential clock input.
8
CLK3
Input Pulldown Non-inverting differential clock input.
9
nCLK3
Input
Pullup Inverting differential clock input.
10, 11
12, 13
V_EE
Power
nc
Unused
Negative supply pins. Connect to ground.
No connect.
15, 16
nQ0, Q0
Output
Differential output pairs. LVPECL interface levels.
18
SEL0
Input Pulldown Clock select input. LVCMOS / LVTTL interface levels.
19
SEL1
Input Pulldown Clock select input. LVCMOS / LVTTL interface levels.
NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
CLK, nCLK,
CLK1, nCLK1,
CLK2, nCLK2,
CLK3, nCLK3
SEL0, SEL1
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions Minimum Typical Maximum Units
4
pF
4
pF
51
KΩ
51
KΩ
TABLE 3. CONTROL INPUT FUNCTION TABLE
SEL1
0
0
1
1
Inputs
SEL0
0
1
0
1
Clock Out
CLK
CLK0, nCLK0
CLK1, nCLK1
CLK2, nCLK2
CLK3, nCLK3
85357AG-01
www.icst.com/products/hiperclocks.html
2
REV. A JULY 16, 2001