ICS853013 Datasheet, PDF (2/17 Pages) Integrated Circuit Systems – LOW SKEW, DUAL, 1-TO-3, DIFFERENTIAL-TO-2.5V/3.3V/5V LVPECL/ECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS853013
LOW SKEW, DUAL, 1-TO-3, DIFFERENTIAL-TO-
2.5V/3.3V/5V LVPECL/ECL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
nQA0, QA0 Output
Differential output pair. LVPECL interface levels.
3, 8, 16
4
V_CC
PCLKA
Power
Power supply pins.
Input Pulldown Non-inverting differential LVPECL clock input.
5
nPCLKA
Input
Pullup/
Pulldown
Inverting differential LVPECL clock input. V_CC/2 default when left floating.
6
PCLKB
Input Pulldown Non-inverting differential LVPECL clock input.
7
nPCLKB
Input
Pullup/
Pulldown
Inverting differential LVPECL clock input. V_CC/2 default when left floating.
9, 10
nQB0, QB0 Output
Differential output pair. LVPECL interface levels.
11
12, 13
V_EE
nQB1, QB1
Power
Output
Negative supply pin.
Differential output pair. LVPECL interface levels.
14, 15 nQB2, QB2 Output
Differential output pair. LVPECL interface levels.
17, 18 nQA2, QA2 Output
Differential output pair. LVPECL interface levels.
19, 20 nQA1, QA1 Output
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
R_PULLDOWN
R
VCC/2
Parameter
Input Pulldown Resistor
Pullup/Pulldown Resistors
Test Conditions
Minimum
Typical
75
50
Maximum
Units
kΩ
kΩ
TABLE 3. CLOCK INPUT FUNCTION TABLE
Inputs
PCLKA or
PCLKB
nPCLKA or
nPCLKB
Outputs
QA0:QA2,
QB0:QB2
nQA0:nQA2,
nQB0:nQB2
Input to Output Mode
Polarity
0
1
LOW
HIGH
Differential to Differential Non Inverting
1
0
HIGH
LOW
Differential to Differential Non Inverting
0
Biased; NOTE 1
LOW
HIGH
Single Ended to Differential Non Inverting
1
Biased; NOTE 1
HIGH
LOW
Single Ended to Differential Non Inverting
Biased; NOTE 1
0
HIGH
LOW
Single Ended to Differential
Inverting
Biased; NOTE 1
1
LOW
HIGH
Single Ended to Differential
Inverting
NOTE 1: Please refer to the Application Information, "Wiring the Differential Input to Accept Single Ended Levels".
853013AM
www.icst.com/products/hiperclocks.html
2
REV. A OCTOBER 19, 2005