ICS85211BI-03 Datasheet, PDF (2/14 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS85211BI-03
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
Q0, nQ0
Output
Differential output pair. LVHSTL interface levels.
3, 4
Q1, nQ1
Output
Differential output pair. LVHSTL interface levels.
5
GND
Power
Power supply ground.
6
nCLK
Input
Pullup/
Pulldown
Inverting differential clock input. V_DD/2 default when left floating.
7
CLK
Input
Pullup Non-inverting differential clock input.
8
V_DD
Power
Positive supply pin.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
KΩ
KΩ
TABLE 3. CLOCK INPUT FUNCTION TABLE
CLK
Inputs
nCLK
Outputs
Q0, Q1
nQ0, nQ1
Input to Output Mode
Polarity
0
0
LOW
HIGH
Differential to Differential
Non Inverting
1
1
HIGH
LOW
Differential to Differential
Non Inverting
0
Biased; NOTE 1
LOW
HIGH
Single Ended to Differential Non Inverting
1
Biased; NOTE 1
HIGH
LOW
Single Ended to Differential Non Inverting
Biased; NOTE 1
0
HIGH
LOW
Single Ended to Differential
Inverting
Biased; NOTE 1
1
LOW
HIGH
Single Ended to Differential
Inverting
NOTE 1: Please refer to the Application Information section, "Wiring the Differential Input to Accept Single Ended Levels".
85211BMI-03
www.icst.com/products/hiperclocks.html
2
REV. B NOVEMBER 15, 2005