ICS8520 Datasheet, PDF (2/8 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8520
LOW SKEW, 1-TO-16
DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 11,
14, 24,
25, 35,
38, 48
VCCO
Power
Output supply pins. Connect to 1.8V.
2, 3
Q11, nQ11 Output
Differential output pair. LVHSTL interface levels.
4, 5
Q10, nQ10 Output
Differential output pair. LVHSTL interface levels.
6, 19,
30, 43
VEE
Power
Negative supply pins. Connect to ground.
7, 8
Q9, nQ9 Output
Differential output pair. LVHSTL interface levels.
9, 10
Q8, nQ8 Output
Differential output pair. LVHSTL interface levels.
12, 13
VCC
Power
Positive supply pins. Connect to 3.3V.
15, 16
Q7, nQ7 Output
Differential output pair. LVHSTL interface levels.
17, 18
Q6, nQ6 Output
Differential output pair. LVHSTL interface levels.
20, 21
Q5, nQ5 Output
Differential output pair. LVHSTL interface levels.
22, 23
Q4, nQ4 Output
Differential output pair. LVHSTL interface levels.
26, 27
Q3, nQ3 Output
Differential output pair. LVHSTL interface levels.
28, 29
Q2, nQ2 Output
Differential output pair. LVHSTL interface levels.
36
CLK
Input Pulldown Non inverting differential clock input.
37
nCLK
Input
Pullup Inverting differential clock input.
39, 40 Q15, nQ15 Output
Differential output pair. LVHSTL interface levels.
41, 42 Q14, nQ14 Output
Differential output pair. LVHSTL interface levels.
44, 45 Q13, nQ13 Output
Differential output pair. LVHSTL interface levels.
46, 47 Q12, nQ12 Output
Differential output pair. LVHSTL interface levels.
NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
ICS8520DY
www.icst.com/products/hiperclocks.html
2
REV. B JULY 5, 2001