ICS843204I Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843204I
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
nQA1, QA1 Output
Differential output pair. LVPECL interface levels.
3, 4
nQA0, QA0 Output
Differential output pair. LVPECL interface levels.
5, 10, 11, 12,
13, 20, 25, 26,
27, 28, 29, 37,
38, 44
nc
Unused
No connect.
6
V_{CCO_A}
Power
Output supply pin for Bank A outputs.
Select pin. When HIGH, selects QA1/nQA1 at 155.52MHz.
7
SELA1
Input Pulldown When LOW, selects QA1/nQA1 at 156.25MHz.
LVCMOS/LVTTL interface levels.
Select pin. When HIGH, selects QA0/nQA0 at 155.52MHz.
8
SELA0
Input Pulldown When LOW, selects QA1/nQA1 at 156.25MHz.
LVCMOS/LVTTL interface levels.
9
PLL_BYPASS_A Input Pullup When LOW, PLL is bypassed. When HIGH, PLL output is active.
14, 15
XTAL_IN1,
XTAL_OUT1
Input
Parallel resonant crystal interface. XTAL_OUT1 is the output,
XTAL_IN1 is the input.
16, 47
CLK1, CLK0
Input Pulldown LVCMOS/LVTTL clock inputs.
21, 22
QB0, nQB0 Ouput
Differential output pair. LVPECL interface levels.
17
IN_SEL_B
Input
Pullup
Select pin. When HIGH, selects XTAL1 inputs. When LOW,
selects CLK1 input. LVCMOS/LVTTL interface levels.
18
PLL_BYPASS_B Input Pullup When LOW, PLL is bypassed. When HIGH, PLL output is active.
19
23, 24
V_{CCO_B}
QB1, nQB1
Power
Ouput
Output supply pin for Bank B outputs.
Differential output pair. LVPECL interface levels.
Select pin. When HIGH, selects QB1/nQB1 at 155.52MHz.
31
SELB1
Input Pullup When LOW, selects QB1/nQB1 at 156.25MHz.
LVCMOS/LVTTL interface levels.
30, 39
32, 40
33
34
V_CCA
V_CC
OEB1
OEB0
Power
Power
Input
Input
Pullup
Pullup
Analog supply pins.
Core supply pins.
Output enable pin. QB1/nQB1 outputs are enable.
LVCMOS/LVTTL interface levels.
Output enable pin. QB0/nQB0 outputs are enabled.
LVCMOS/LVTTL interface levels.
35, 43
36
41
42
45, 46
48
V_EE
SELB0
OEA1
OEA0
XTAL_OUT0,
XTAL_IN0
IN_SEL_A
Power
Input
Input
Input
Input
Input
Pullup
Pullup
Pullup
Pullup
Negative supply pins.
Select pin. When HIGH, selects QB0/nQB0 at 155.52MHz.
When LOW, selects QB0/nQB0 at 156.25MHz.
LVCMOS/LVTTL interface levels.
Output enable pin. QA1/nQA1 outpus are enabled.
LVCMOS/LVTTL interface levels.
Output enable pin. QA0/nQA0 outputs are enabled.
LVCMOS/LVTTL interface levels.
Parallel resonant crystal interface. XTAL_OUT0 is the output,
XTAL_IN0 is the input.
Select pin. When HIGH, selects XTAL0 inputs. When LOW,
selects CLK0 input. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
C_IN
R_PULLDOWN
R_PULLUP
843204AGI
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
www.icst.com/products/hiperclocks.html
4
pF
51
kΩ
51
kΩ
REV. A JANUARY 6, 2006
2