ICS604 Datasheet, PDF (2/4 Pages) Integrated Circuit Systems – Intel Graphics Clock Source

Pin Assignment
X1/ICLK ¹
VDDC 2
GND ³
14.3M 4
PRELIMINARY INFORMATION
ICS604
Intel Graphics Clock Source
8 _X2
7 _VDDIO
6 _24.576M
5 48M
Pin Descriptions
Number
1
2
3
4
5
6
7
8
Name
X1/ICLK
VDDC
GND
14.3M
48M
24.576M
VDDIO
X2
Type
XI
P
P
O
O
O
P
XO
Description
Crystal connection for 14.31818 MHz crystal, or clock input.
Connect to +3.3V or +5V. +5 V recommended for lowest output noise (jitter).
Connect to ground.
Buffered crystal oscillator output clock.
48.0 MHz clock output for Intel graphics controller.
24.576 MHz clock output.
Connect to +3.3 V or +5 V. Cannot be greater than VDDC.
Crystal connection for 14.31818 MHz crystal. Leave unconnected for clock input.
Key: I = Input; O = output; XI, XO = crystal connections; P = power supply connection
External Components / Crystal Selection
The ICS604 requires 0.01 µF decoupling capacitors to be connected between VDDC and GND, and
between VDDIO and GND. They must be connected close to the ICS604 to minimize lead inductance.
No external power supply filtering is required for this device. A 33 Ω terminating resistor can be used next
to the output pins when driving 50 Ω lines. The total on-chip crystal capacitance is approximately 6 pF,
and a parallel resonant, fundamental mode crystal should be used. Crystal capacitors should be connected
from each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF)
of these crystal caps should be = (C_L-6)*2, where C_L is the crystal load capacitance in pF. For a clock
input, connect to X1 and leave X2 unconnected (no capacitors on either).
MDS 604 A
2
Revision 022499
Printed 11/14/00
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