ICS477-05 Datasheet, PDF (2/7 Pages) Integrated Circuit Systems – Quad PLL with VCXO for HDTV

ICS477-05
Quad PLL with VCXO for HDTV
Pin Assignment
X1
1
GND
2
GND
3
V IN
4
VDD
5
VDD
6
GND
7
GND
8
GND
9
GND
10
54.054M
11
NC
12
NC
13
74.175M
14
28
X2
27
VDD
26
PDTS
25
GND
24
VDD
23
VDD
22
VDD
21
GND
20
GND
19
GND
18
54M
17
NC
16
27M
15
27M
28 p in (1 50 m il) S S O P
Pin Descriptions
Pin
Number
1
2
3
4
5, 6, 22, 23,
24, 27
7, 8, 9, 10, 19,
20, 21
11
12, 13, 17
14
15, 16
18
25
26
28
Pin
Name
XI
GND
GND
VIN
VDD
Pin Type
Pin Description
Input
Power
Power
Input
Power
Crystal connection. Connect to a 27 MHz fundamental mode pullable crystal.
Connect to ground.
Connect to ground.
VCXO Voltage input. Zero to 3.3 V analog control voltage for VCXO.
Connect to +3.3 V.
GND
Power Connect to ground.
54.054M
NC
74.175M
27M
54M
GND
PDTS
X2
Output
-
Output
Output
Output
Power
Input
Input
54.054 MHz clock output. Weak internal pull-down when tri-state.
No connect. Do not connect anything to these pins.
74.175 MHz clock output. Weak internal pull-down when tri-state.
27 MHz reference clock output. Weak internal pull-down when tri-state.
54 MHz clock output. Weak internal pull-down when tri-state.
Connect to ground.
Powers down entire chip. Tri-states CLK outputs when low. Internal pull-up.
Crystal connection. Connect to a 27 MHz fundamental mode pullable crystal.
MDS 477-05 H
2
Revision 062404
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