ICS271 Datasheet, PDF (2/8 Pages) Integrated Circuit Systems – Triple PLL Field Programmable VCXO Clock Synthesizer

PRELIMINARY INFORMATION
Pin Assignment
ICS271
Triple PLL Field Programmable VCXO Clock Synthesizer
VIN 1
S0 2
S1 ³
VDD 4
VDDO1 5
CLK1 6
CLK2 ⁷
CLK3 ⁸
GND 9
X1 10
20 S2
19 VDD
18 PDTS
17 GND
16 CLK6
15 _CLK5
14 _CLK4
13 _VDDO2
12 VDD
11 X2
20 pin (173 mil) TSSOP
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
VIN
S0
S1
VDD
VDDO1
CLK1
CLK2
CLK3
GND
X1
X2
VDD
VDDO2
CLK4
CLK5
CLK6
GND
PDTS
VDD
S2
Pin
Type
Input
Input
Input
Power
Power
Output
Output
Output
Power
XI
XO
Power
Power
Output
Output
Output
Power
Input
Power
Input
Pin Description
Voltage input to VCXO. Zero to 3.3 V signal which controls the VCXO
frequency
Select pin 0. Internal pull-up resistor.
Select pin 1. Internal pull-up resistor.
Connect to +3.3 V.
Power supply for outputs CLK1-CLK3. Must not exceed VDD.
Output clock 1. Weak internal pull-down when tri-state.
Output clock 2. Weak internal pull-down when tri-state.
Output clock 3. Weak internal pull-down when tri-state.
Connect to ground.
Crystal input. Connect this pin to a crystal.
Crystal Output. Connect this pin to a crystal.
Connect to +3.3 V.
Power supply for outputs CLK4-CLK6. Must not exceed VDD.
Output clock 4. Weak internal pull-down when tri-state.
Output clock 5. Weak internal pull-down when tri-state.
Output clock 6. Weak internal pull-down when tri-state.
Connect to ground.
Power-down tri-state. Powers down entire chip and tri-states clock outputs
when low. Internal pull-up resistor.
Connect to +3.3 V.
Select pin 2. Internal pull-up resistor.
MDS 271 A
2
Revision 040705
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