9DBL411B Datasheet, PDF (2/9 Pages) Integrated Device Technology – Four Output Low Power Differential Fanout Buffer for PCI Express Gen1, Gen2, and QPI

9DBL411B
Four Output Low Power Differential Buffer for PCI Express Gen1, Gen2, Gen3, and QPI
Advance Information
Pin Configurations
20 19 18 17 16
VDDA 1
15 VDD_IO
GNDA 2
14 GND
OE3# 3 9DBL411B 13 OE1#
DIF3C_LPR 4
12 DIF1T_LPR
DIF3T_LPR 5
11 DIF1C_LPR
6 7 8 9 10
20-pin MLF
OE0# 1
DIF_INC 2
DIF_INT 3
VDDA 4
GNDA 5
OE3# 6
DIF3C_LPR 7
DIF3T_LPR 8
VDD_IO 9
GND 10
20 DIF0T_LPR
19 DIF0C_LPR
18 VDD_IO
17 GND
16 OE1#
15 DIF1T_LPR
14 DIF1C_LPR
13 OE2#
12 DIF2T_LPR
11 DIF2C_LPR
20-pin TSSOP
Terminations
Zo
9DBL411
Rs
Zo
Rs
Zo – 17 = Rs (ohms), where Zo is the single-ended intrinsic impedance of the board
transmission line. Single-ended intrinsic impedance is ½ that of the differential
impedance.
Single Ended Rs
Impedance 5%
Rs
(Zo)
tolerance 2% tolerance
Notes
50
33
33.2 In general, 5% resistors
45
27
27.4 may be used. All values are
42.5
24 or 27
24.9 in ohms.
IDT^® Four Output Low Power Differential Buffer for PCI Express for Gen1, Gen2, Gen3, and QPI
2
1645F—08/16/13