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M1025 Datasheet, PDF (12/14 Pages) Integrated Circuit Systems – VCSO BASED CLOCK PLL WITH AUTOSWITCH
Integrated
Circuit
Systems, Inc.
M1025/26
VCSO BASED CLOCK PLL WITH AUTOSWITCH
Product Data Sheet
ELECTRICAL SPECIFICATIONS (CONTINUED)
AC Characteristics
Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial), TA = -40 oC to +85 oC (industrial), FVCSO = FOUT = 150-175MHz,
LVPECL outputs termnated with 50Ω to VCC - 2V
Symbol Parameter
Min Typ Max Unit Conditions
FIN
Input Frequency
DIF_REF0, nDIF_REF0,
DIF_REF1, nDIF_REF1
15
700 MHz
FOUT
APR
KVCO
PLL Loop RIN
Constants 1
Output Frequency
FOUT, nFOUT
Absolute Pull-Range
of VCSO
VCO Gain
Internal Loop Resistor
Commercial
Industrial
Wide Bandwidth
Narrow Bandwidth
62.5
±120
±50
±200
±150
200
100
2100
175 MHz
ppm
ppm
kHz/V
kΩ
kΩ
BWVCSO VCSO Bandwidth
Φn
Phase Noise
and Jitter
J(t)
Single Side Band
Phase Noise
@155.52MHz
Jitter (rms)
@155.52MHz
odc Output Duty Cycle 2
tR
Output Rise Time 2
for FOUT, nFOUT
tF
Output Fall Time 2
for FOUT, nFOUT
1kHz Offset
10kHz Offset
100kHz Offset
12kHz to 20MHz
700
-83
-113
-136
0.4
45
50
350 450
kHz
dBc/Hz Fin=19.44 or
dBc/Hz
38.88_MHz
Tot. PLL ratio = 8
dBc/Hz or 4. See pg. 3
0.6 ps
55 %
550 ps
20% to 80%
350 450
550 ps
20% to 80%
Table 11: AC Characteristics
Note 1: Parameters needed for PLL Simulator software; see Table 7, Example External Loop Filter Component Values, on pg. 9.
Note 2: See Parameter Measurement Information on pg. 12.
PARAMETER MEASUREMENT INFORMATION
Output Rise and Fall Time
Output Duty Cycle
nFOUT
20%
Clock Output
80%
tR
80%
VP-P
20%
tF
Figure 6: Output Rise and Fall Time
FOUT
odc =
tPW
tPERIOD
tPW
(Output Pulse Width)
tPERIOD
Figure 7: Output Duty Cycle
M1025/26 Datasheet Rev 1.0
12 of 14
Revised 28Jul2004
Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400