ICS97U2A877A Datasheet, PDF (12/14 Pages) Integrated Circuit Systems – 1.8V Low-Power Wide-Range Frequency Clock Driver

ICS97U2A8 77A
Advance Information
Figure 11. AV_DD Filtering
- Place the 2200pF capacitor close to the PLL.
- Use a wide trace for the PLL analog power & ground. Connect PLL & caps to AGND trace & connect trace to one
GND via (farthest from PLL).
- Recommended bead: Fair-Rite P/N 2506036017Y0 or equivalent (0.8 Ohm DC max, 600 Ohms @ 100 MHz).
1180—11/14/05
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