ICS950811 Datasheet, PDF (12/18 Pages) Integrated Circuit Systems – Frequency Generator with 200MHz Differential CPU Clocks

ICS950811
Un-Buffered Mode 3V66 & PCI Phase Relationship
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock,
there is no defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66
by the standard skew described below as Tpci.
3V66 (1:0)
3V66 (4:2)
3V66_5
Tpci
PCICLK_F (2:0) PCICLK (6:0)
Group Skews at Common Transition Edges: (Un-Buffered Mode)
GROUP
SYMBOL
CONDITIONS
MIN TYP
3V66
3V66 3V66 (5:0) pin to pin skew
0
42
MAX UNITS
500 ps
PCI
PCI PCI_F (2:0) and PCI (6:0) pin to pin skew 0 130 500 ps
3V66 to PCI
S_3V66-PCI 3V66 (5:0) leads 33MHz PCI
1_{Guaranteed by design, not 100% tested in production.}
1.5 2.86 3.5 ns
0482E—08/09/07
12