ICS853111A Datasheet, PDF (12/18 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS853111A
LOW SKEW, 1-TO-10
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
SCHEMATIC EXAMPLE
This application note provides general design guide using
ICS853111A LVPECL buffer. Figure 6 shows a schematic ex-
ample of the ICS853111A LVPECL clock buffer. In this example,
the input is driven by an LVPECL driver. CLK_SEL is set at logic
low to select PCLK0/nPCLK0 input.
Zo = 50
+
Zo = 50
-
VC C
R2
R1
50
50
VCC
C6 (Option)
R3
0.1u
50
Zo = 50 Ohm
Zo = 50 Ohm
3.3V LVPECL
R9
50
C8 (Option)
0.1u
R4
1K
R10
50
R11
50
1
2 ^VCC
3 ^CLK_SEL
4
5
6
7
PCLK0
nPCLK0
VBB
PCLK1
8 ^nPCLK1
VEE
VCC
VCC=3.3V
(U1-9)
(U1-16)
VCC
(U1-25) (U1-32) (U1-1)
C1
0.1uF
C2
0.1uF
C3
0.1uF
C4
0.1uF
C5
0.1uF
24
Q3 ₂₃
nQ3 ₂₂
Q4
nQ4
Q5
nQ5
21
20
19
18
Q6 ₁₇
nQ6
U1
ICS853111
Zo = 50
Zo = 50
+
-
R8
R7
50
50
C7 (Option)
0.1u
R13
50
FIGURE 6. EXAMPLE ICS853111A LVPECL CLOCK OUTPUT BUFFER SCHEMATIC
853111AY
www.icst.com/products/hiperclocks.html
12
REV. B MAY 14, 2004