ICS950202 Datasheet, PDF (11/19 Pages) Integrated Circuit Systems – Programmable Timing Control HubTM for P4TM

Integrated
Circuit
Systems, Inc.
ICS950202
Byte 20: Group Skew Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
PCI_Skew 3
PCI_Skew 2
PCI_Skew 1
PCI_Skew 0
Reserved
Reserved
Reserved
Reserved
PWD
1
0
0
0
1
0
0
0
Description
These 4 bits can change the CPU to PCI (8:0) skew from 2.2ns
0.7ns. Default at power up is 0.5ns. Each binary increment or
decrement of Bits (3:0) will increase or decrease the delay of the
PCI clocks by 100ps.
Reserved
Reserved
Reserved
Reserved
Byte 21: Slew Rate Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
PCICLK8 Slew 1
PCICLK8 Slew 0
PCICLK7 Slew 1
PCICLK7 Slew 0
3V66 (3:1)_Slew 1
3V66 (3:1)_Slew 1
3V66_0_Slew 1
3V66_0_Slew 0
PWD
1
0
1
0
1
0
1
0
Description
PCICLK8 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
PCICLK7 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
3V66 (3:1) clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
3V66_0 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
Byte 22: Slew Rate Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
REF Slew 1
REF Slew 0
PCI (6:4) Slew 1
PCI (6:4) Slew 0
PCI (3:1) Slew 1
PCI (3:1) Slew 0
PCI0 Slew 1
PCI0 Slew 0
PWD
1
0
1
0
1
0
1
0
Description
REF clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
PCI (6:4) clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
PCI (3:1) clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
PCI0 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
Byte 23: Slew Rate Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Reserved
Reserved
VCH Slew 1
VCH Slew 0
48USB Slew 1
48USB Slew 0
48DOT Slew 1
48DOT Slew 0
PWD
X
X
1
0
1
0
1
0
Description
Reserved
VCH clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
48USB clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
48DOT clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
0461L—05/28/03
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