ICS8524 Datasheet, PDF (11/17 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8524
LOW SKEW, 1-TO-22
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
SCHEMATIC EXAMPLE
Figure 5 shows a schematic example of the ICS8524. In this
example, the input is driven by an ICS HiPerClockS HSTL driver.
The decoupling capacitors should be physically located near the
power pin. For ICS8524, the unused clock outputs can be left
floating.
VDDO=1.8V
Zo = 50
Zo = 50
+
-
R2 R1
50 50
U3
1.8V
Zo = 50 Ohm
Zo = 50 Ohm
LVHSTL Driv er
R9
50
VDD=3.3V
R10
50
C9
0.1u
R12 1K
VDD=3.3V
R11 1K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VDDO
nc
nc
VDD
CLK
nCLK
CLK_SEL
PCLK
nPCLK
GND
OE
nc
nc
nQ21
Q21
VDDO
ICS8524
VDDO
48
47
Q7
nQ7
46
45
Q8
nQ8
Q9
44
43
42
nQ9
Q10
41
40
nQ10
Q11
nQ11
39
38
37
Q12
nQ12
Q13
nQ13
VDDO
36
35
34
33
(U1-1)
(U1-16)
VDDO=1.8V
(U1-17) (U1-32) (U1-33) (U1-48) (U1-49) (U1-64)
C1
0.1uF
C2
0.1uF
C3
0.1uF
C4
0.1uF
C5
0.1uF
C6
0.1uF
C7
0.1uF
C8
0.1uF
Zo = 50
Zo = 50
+
-
R8 R7
50 50
FIGURE 5. ICS8524 HSTL BUFFER SCHEMATIC EXAMPLE
THERMAL RELEASE PATH
The expose metal pad provides heat transfer from the device to
the P.C. board. The expose metal pad is ground pad connected
to ground plane through thermal via. The exposed pad on the
device to the exposed metal pad on the PCB is contacted through
solder as shown in Figure 6. For further information, please re-
fer to the Application Note on Surface Mount Assembly of
Amkor’s Thermally /Electrically Enhance Leadframe Base Pack-
age, Amkor Technology.
SOLDER M ASK
SIGNAL
TRACE
EXPOSED PAD
SOLDER
SIGNAL
TRACE
8524AY
GROUND PLANE
THERMAL VIA
Expose Metal Pad
(GROUND PAD)
FIGURE 6. P.C. BOARD FOR EXPOSED PAD THERMAL RELEASE PATH EXAMPLE
www.icst.com/products/hiperclocks.html
11
REV. B SEPTEMBER 18, 2003