ICS843002I Datasheet, PDF (11/16 Pages) Integrated Circuit Systems – FEMTOCLOCKS-TM CRYSTAL-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS843002I
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL FREQUENCY SYNTHESIZER
LAYOUT GUIDELINE
Figure 5A shows a schematic example of the ICS843002I. An
example of LVEPCL termination is shown in this schematic.
Additional LVPECL termination approaches are shown in the
LVPECL Termination Application Note. In this example, an
18pF parallel resonant 26.5625MHz crystal is used. The
C1=27pF and C2=33pF are recommended for frequency ac-
curacy. For different board layout, the C1 and C2 may be
slightly adjusted for optimizing frequency accuracy.
VCC
R2
10 C3
10uF
Logic Control Input Examples
VC C A
C4
0.01u
VCC
C6
0.1u
Set Logic
VCC _{Input to}
'1'
RU1
1K
To Logic
Input
pins
RD1
Not Install
Set Logic
VCC _{Input to}
'0'
RU2
Not Install
To Logic
Input
pins
RD2
1K
ICS843002I
C2
33pF
X1
26.5625MHz
18pF
C1
27pF
VCCO
C7
0.1u
U1
ICS843002i
VCC=3.3V
VCCO=3.3V
VCCO
C8
0.1u
3.3V
R3
133
Zo = 50 Ohm
Zo = 50 Ohm
R4
82.5
R5
133
+
-
R6
82.5
Zo = 50 Ohm
Zo = 50 Ohm
R7
50
+
-
R8
50
R9
50
C9
0.1u
Optional Termination
FIGURE 5A. ICS843002I SCHEMATIC EXAMPLE
PC BOARD LAYOUT EXAMPLE
Figure 5B shows an example of ICS843002I P.C. board layout.
The crystal X1 footprint shown in this example allows installa-
tion of either surface mount HC49S or through-hole HC49 pack-
age.The footprints of other components in this example are listed
in the Table 6. There should be at least one decoupling capacitor
per power pin. The decoupling capacitors should be located as
close as possible to the power pins. The layout assumes that
the board has clean analog power ground plane.
TABLE 6. FOOTPRINT TABLE
Reference
Size
C1, C2
0402
C3
0805
C4, C5, C6, C7, C8
0603
R2
0603
NOTE: Table 6, lists component sizes
shown in this layout example.
FIGURE 5B. ICS843002I PC BOARD LAYOUT EXAMPLE
843002AGI
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11
REV. A JANUARY 4, 2006