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ICS84321 Datasheet, PDF (10/18 Pages) Integrated Circuit Systems – 260MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
ICS84321
260MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
TERMINATION FOR LVPECL OUTPUTS
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs.Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
drive 50Ω transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion. Figures 2A and 2B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
Zo = 50Ω
FOUT
FIN
Zo = 50Ω
50Ω
RTT =
1
((VOH + VOL) / (VCC – 2)) – 2
Zo
50Ω
VVCCCC -- 22VV
RTT
FOUT
3.3V
125Ω
125Ω
Zo = 50Ω
FIN
Zo = 50Ω
84Ω
84Ω
FIGURE 2A. LVPECL OUTPUT TERMINATION
FIGURE 2B. LVPECL OUTPUT TERMINATION
CRYSTAL INPUT INTERFACE
The ICS84321 has been characterized with 18pF parallel reso-
nant crystals.The capacitor values shown in Figure 3 below were
determined using a 25MHz, 18pF parallel resonant crystal and
were chosen to minimize the ppm error. These same capacitor
values will tune any 18pF parallel resonant crystal over the fre-
quency range of 14MHz to 40MHz providing the other param-
eters specified in Table 6, Crystal Characteristics, are satisfied.
84321AY
X1
18pF Parallel Crystal
XTAL_IN
C1
18p
XTAL_OUT
C2
22p
Figure 3. CRYSTAL INPUt INTERFACE
www.icst.com/products/hiperclocks.html
10
REV. B JUNE 9, 2005