ICS8430I-71B Datasheet, PDF (10/16 Pages) Integrated Circuit Systems – 700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8430BI-71
700MHZ, LOW JITTER, CRYSTAL INTERFACE/
LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
LAYOUT GUIDELINE
The schematic of the ICS8430BI-71 layout example used in this
layout guideline is shown in Figure 5A. The ICS8430BI-71 rec-
ommended PCB board layout for this example is shown in Fig-
ure 5B. This layout example is used as a general guideline. The
layout in the actual system will depend on the selected com-
ponent types, the density of the components, the density of
the traces, and the stack up of the P.C. board.
U1
1
2
3
4
M5
M6
M7
5 ^M8
6
7
8
N0
N1
N2
VEE
ICS8430BI-71
C14
0.1u
C1
C2
X1
VCC
24
X_OUT
TEST_CLK
XTAL_SEL
23
22
21
VCCA ₂₀
S_LOAD
S_DATA
S_CLOCK
MR
19
18
17
REF_IN
XTAL_SEL
S_LOAD
S_DATA
S_CLOCK
VCCA
C11
0.01u
R7
10
C16
10u
C15
0.1u
Zo = 50 Ohm
IN+
TL1
Zo = 50 Ohm
IN-
TL2
VCC
R1
R3
125
125
+
-
R2
R4
84
84
FIGURE 5A. SCHEMATIC OF RECOMMENDED LAYOUT
8430BYI-71
www.icst.com/products/hiperclocks.html
10
REV. A FEBRUARY 17, 2006