ICS9148-08 Datasheet, PDF (1/14 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for PENTIUM/Pro

Integrated
Circuit
Systems, Inc.
ICS9148 - 08
Frequency Generator & Integrated Buffers for PENTIUM/Pro^TM
General Description
The ICS9148-08 generates all clocks required for high
speed RISC or CISC microprocessor systems such as Intel
PentiumPro or Cyrix. Eight different reference frequency
multiplying factors are externally selectable with smooth
frequency transitions.
Features include four CPU, seven PCI and Twelve SDRAM
clocks. Two reference outputs are available equal to the
crystal frequency. Plus the IOAPIC output powered by
VDDL1. One 48 MHz for USB, and one 24 MHz clock for
Super IO. Spread Spectrum built in ±1.5% modulation to
reduce the EMI. Serial programming I²C interface allows
changing functions, stop clock programing and Frequency
selection. Rise time adjustment for VDD at 3.3V or 2.5V CPU.
Additionally, the device meets the Pentium power-up
stabilization, which requires that CPU and PCI clocks be stable
within 2ms after power-up. It is not recommended to use I/O
dual function pin for the slots (ISA, PCI, CPU, DIMM). The
add on card might have a pull up or pull down.
Features
• 3.3V outputs: SDRAM, PCI, REF, 48/24 MHz
• 2.5V or 3.3V outputs; CPU, IOAPIC
• 20 ohm CPU clock output impedance
• 20 ohm PCI clock output impedance
• Skew from CPU (earlier) to PCI clock - 1 to 4 ns,
center 2.6 ns.
• No external load cap for C_L=18pF crystals
• ±250 ps CPU, PCI clock skew
• 400ps (cycle to cycle) CPU jitter
• Smooth frequency switch , with selections from 50 to 83.3
MHz CPU.
• I²C interface for programming
• 2ms power up clock stable time
• Clock duty cycle 45-55%.
• 48 pin 300 mil SSOP package
• 3.3V operation, 5V tolerant input.
Pin Configuration
High drive PCICLK and SDRAM outputs typically provide
greater than 1 V/ns slew rate into 30pF loads. CPUCLK
outputs typically provide better than 1V/ns slew rate into
20pF loads while maintaining 50±5% duty cycle. The REF
and 24 and 48 MHz clock outputs typically provide better
than 0.5V/ns slew rates.
Block Diagram
9148-08 Rev A 092297P
48-Pin SSOP
* Internal Pull-up Resistor of
240K to 3.3V on indicated inputs
Power Groups
VDD1 = REF (0:1), X1, X2
VDD2 = PCICLK_F, PCICLK(0:5)
VDD3 = SDRAM (0:11), supply for PLL core,
24MHz, 48MHz
VDDL1 = IOAPIC
VDDL2 = CPUCLK (0:3)
Pentium is a trademark of Intel Corporation
I²C is a trademark of Philips Corporation
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.