ICS9112-27 Datasheet, PDF (1/8 Pages) Integrated Circuit Systems – Low Skew PCI / PCI-X Buffer

Integrated
Circuit
Systems, Inc.
ICS9112-27
Preliminary Product Preview
Low Skew PCI / PCI-X Buffer
General Description
The ICS9112-27 is a high performance, low skew, low jitter
PCI / PCI-X clock driver. It is designed to distribute high
speed signals in PCI / PCI-X applications operating at speeds
from 0 to 140 MHz.
The ICS9112-27 is characterized for operation from -40°C to
85°C for automotive and industrial applications.
Features
• Frequency range 0 - 140 MHz (3.3V)
• Less than 200 ps Jitter between outputs
• Skew controlled outputs < 100 ps
• Distribute one clock input to one bank of four
outputs
• 3.3V ±10% operation
• Available in 8 pin TSSOP, and SOIC packages.
Block Diagram
OE
LOGIC
CONTROL
CLK_IN
Pin Descriptions
PIN NUMBER
1
2
3
4
5
6
7
8
PIN NAME
CLK_IN
OE
CLK0
GND
CLK1
VDD
CLK2
CLK3
Pin Configuration
CLK0
CLK1
CLK2
CLK3
CLK_IN 1
OE 2
CLK0 3
GND 4
8 CLK3
7 CLK2
6 VDD
5 CLK1
8 pin TSSOP & SOIC
Functionality Table
INPUTS
CLK_IN
OE
0
0
0
1
1
0
1
1
OUTPUTS
CLK(3:0)
0
0
0
1
TYPE
IN
IN
OUT
PWR
OUT
PWR
OUT
OUT
DESCRIPTION
Input reference frequency.
Output enable (has internal pull_up.) when OE is low, it tristates the clock
outputs
Buffered clock output
Ground
Buffered clock output
Power supply for 3.3V
Buffered clock output
Buffered clock output
9112-27 Rev B 02/27/01
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.