ICS85314I-01 Datasheet, PDF (1/19 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS85314I-01
LOW SKEW, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
GENERAL DESCRIPTION
FEATURES
The ICS85314I-01 is a low skew, high perfor- • 5 differential 2.5V/3.3V LVPECL outputs
ICS
HiPerClockS™
mance 1-to-5 Differential-to-2.5V/3.3V LVPECL
Fanout Buffer and a member of the HiPerClockS™
• Selectable differential CLK0, nCLK0 or LVCMOS inputs
family of High Performance Clock Solutions from • CLK0, nCLK0 pair can accept the following differential
ICS. The ICS85314I-01 has two selectable clock input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
inputs. The CLK0, nCLK0 pair can accept most standard
differential input levels. The single-ended CLK1 can accept
LVCMOS or LVTTL input levels. The clock enable is internally
synchronized to eliminate runt clock pulses on the outputs
• CLK1 can accept the following input levels:
LVCMOS or LVTTL
• Maximum output frequency: 700MHz
during asynchronous assertion/deassertion of the clock _{• Translates any single-ended input signal to 3.3V}
enable pin.
LVPECL levels with resistor bias on nCLK input
Guaranteed output and part-to-part skew characteristics
make the ICS85314I-01 ideal for those applications demand-
ing well defined performance and repeatability.
• Output skew: 30ps (maximum), TSSOP package
50ps (maximum), SOIC package
• Part-to-part skew: 350ps (maximum)
• Propagation delay: 1.8ns (maximum)
• RMS phase jitter @ 155.52MHz (12kHz - 20MHz):
0.05ps (typical)
• LVPECL mode operating voltage supply range:
V = 2.375V to 3.8V, V = 0V
CC
EE
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
nCLK_EN
CLK0
nCLK0
00
CLK1
1¹
CLK_SEL
D
Q
LE
PIN ASSIGNMENT
Q0 1
20 VCC
nQ0 2
19 _{nCLK_EN}
Q1 3
18 _VCC
nQ1 4
17 _nc
Q0
Q2 5
16 _CLK1
nQ0
nQ2 6
15 _CLK0
Q3 7
14 _nCLK0
Q1
nQ3 8
13 _nc
nQ1
Q4 9
12 _{CLK_SEL}
Q2
nQ4 10 11 _VEE
nQ2
ICS85314I-01
Q3
20-Lead TSSOP
nQ3
6.5mm x 4.4mm x 0.92mm Package Body
Q4
G Package
nQ4
Top View
ICS85314I-01
20-Lead SOIC
7.5mm x 12.8mm x 2.3mm Package Body
M Package
Top View
85314BGI-01
www.icst.com/products/hiperclocks.html
1
REV. E SEPTEMBER 23, 2005