ICS852911I Datasheet, PDF (1/15 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS852911I
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS852911I is a low skew, 1-to-9 Differen-
ICS
tial-to-HSTL Fanout Buffer and a member of the
HiPerClockS™ _{HiPerClockS™family of High Performance Clock}
Solutions from ICS. The ICS852911I has two se-
lectable clock inputs which can accept most dif-
ferential input levels.
Guaranteed output skew, part-to-part skew and crossover
voltage characteristics make the ICS852911I ideal for today’s
most advanced applications, such as IA64 and static RAMs.
FEATURES
• 9 HSTL outputs
• Selectable differential CLK, nCLK or LVPECL clock inputs
• HSTL_CLK, nHSTL_CLK pair can accept the following
differential input levels: LVPECL, LVDS, HSTL, SSTL, HCSL
• PECL_CLK, nPECL_CLK supports the following input types:
LVPECL, CML, SSTL
• Maximum output frequency: 500MHz
• Output skew: 100ps (maximum)
• Part-to-part skew: 300ps (maximum)
• Propagation delay: 1.7ns (maximum)
• V_OH = 1.4V (maximum)
• 3.3V core, 1.6V to 3.6V output supply range
• -40°C to 85°C ambient operating temperature
BLOCK DIAGRAM
HSTL_CLK
nHSTL_CLK
0
PECL_CLK
nPECL_CLK
1
CLK_SEL
PIN ASSIGNMENT
Q0
nQ0
25 24 23 22 21 20 19
Q1
GND 26
18 Q3
nQ1
CLK_SEL 27
17 nQ3
Q2
HSTL_CLK 28
16 Q4
nQ2
VDD 1
ICS852911I ₁₅ VDDO
Q3
nQ3
nHSTL_CLK 2
14 nQ4
Q4
PECL_CLK 3
13 Q5
nQ4
nPECL_CLK 4
12 nQ5
Q5
5 6 7 8 9 10 11
nQ5
Q6
nQ6
28-Lead PLCC
Q7
11.6mm x 11.4mm x 4.1mm package body
nQ7
V Package
Q8
Top View
nQ8
852911AVI
www.icst.com/products/hiperclocks.html
1
REV. A MAY 23, 2005