ICS85214 Datasheet, PDF (1/16 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS85214
LOW SKEW, 1-TO-5
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS85214 is a low skew, high performance
,&6
1-to-5 Differential-to-HSTL Fanout Buffer and a
HiPerClockS™ _{member of the HiPerClockS™ family of High}
Performance Clock Solutions from ICS. The
CLK0, nCLK0 pair can accept most standard dif-
ferential input levels. The single ended CLK1 input accepts
LVCMOS or LVTTL input levels. Guaranteed output and part-
to-part skew characteristics make the ICS85214 ideal for
those clock distribution applications demanding well de-
fined performance and repeatability.
FEATURES
• 5 differential HSTL compatible outputs
• Selectable differential CLK0, nCLK0 or LVCMOS/LVTTL
clock inputs
• CLK0, nCLK0 pair can accept the following differential
input levels: LVDS, LVPECL, HSTL, SSTL, HCSL
• CLK1 can accept the following input levels:
LVCMOS or LVTTL
• Output frequency up to 700MHz
• Translates any single ended input signal to HSTL levels
with resistor bias on nCLK0 input
• Output skew: 30ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 1.8ns (maximum)
• 3.3V core, 1.8V output operating supply
• 0°C to 85°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM
nCLK_EN
CLK0
nCLK0
00
CLK1
1¹
CLK_SEL
D
Q
LE
PIN ASSIGNMENT
Q0 1
2 0 VDDO
nQ0 2 19 _{nCLK_EN}
Q1 3
18 VDD
nQ1 4 17 _nc
Q0
Q2 5 16 _CLK1
nQ0
nQ2 6 15 _CLK0
Q3 7 14 _nCLK0
Q1
nQ3 8 13 _nc
nQ1
Q4 9 12 _{CLK_SEL}
Q2
nQ4 10 11 _GND
nQ2
ICS85214
Q3
20-Lead TSSOP
nQ3
6.5mm x 4.4mm x 0.92mm package body
Q4
G Package
nQ4
Top View
85214AG
www.icst.com/products/hiperclocks.html
1
REV. A JULY 17, 2003