ICS830-23I Datasheet, PDF (1/12 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER

Integrated
Circuit
Systems, Inc.
ICS83023I
DUAL, 1-TO-1
DIFFERENTIAL-TO-LVCMOS TRANSLATOR /BUFFER
GENERAL DESCRIPTION
The ICS83023I is a dual, 1-to-1 Differential-to-
ICS
LVCMOS Translator/Fanout Buffer and a mem-
HiPerClockS™ _{ber of the HiPerClockS™ family of High Perfor-}
mance Clock Solutions from ICS. The differen-
tial inputs can accept most differential signal
types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and
translate into two single-ended LVCMOS outputs. The small
8-lead SOIC footprint makes this device ideal for use in ap-
plications with limited board space.
Features
• Two LVCMOS / LVTTL outputs
• Two differential CLKx, nCLKx input pairs
• CLK, nCLK pairs can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency: 350MHz (typical)
• Output skew: 60ps (maximum)
• Part-to-part skew: 500ps (maximum)
• Additive phase jitter, RMS: 0.14ps (typical)
• Small 8 lead SOIC package saves board space
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
CLK0
nCLK0
Q0
CLK1
nCLK1
Q1
PIN ASSIGNMENT
CLK0 1
nCLK0 2
nCLK1 3
CLK1 4
8 VDD
7 Q0
6 Q1
5 GND
ICS83023I
8-Lead SOIC
3.8mm x 4.8mm x 1.47mm package body
M Package
Top View
83023AMI
www.icst.com/products/hiperclocks.html
1
REV. B JANUARY 18, 2006