ICS667-01 Datasheet, PDF (1/5 Pages) Integrated Circuit Systems – HDTV CLOCK SYNTHESIZER

ICS667-01
HDTV CLOCK SYNTHESIZER
Description
The ICS667-01 is a low-cost, low jitter,
high-performance PLL clock synthesizer designed to
produce the 74.176 MHz clock necessary for HDTV
systems. Using ICS’ patented analog Phase-Locked
Loop (PLL) techniques, the device accepts a 27 MHz
crystal or clock input. The zero ppm synthesis error
exactly locks the display to the digital stream.
ICS manufactures the largest variety multimedia clock
synthesizers for all applications. Consult ICS to
eliminate crystals and oscillators from your board.
Features
• Packaged in 8-pin SOIC
• Available in Pb (lead) free package
• Input frequency of 27 MHz
• Zero ppm synthesis error in output clock
• 3.3 V ±5% operating supply
• Ideal for HDTV applications and oscillator
manufacturers
• Advanced, low power, sub-micron CMOS process
Block Diagram
27 MHz
crystal or
clock input
ICLK/X1
X2
Clock
Buffer
Optional tuning crystal capacitors
VDD
OE
Clock
Synthesis
and Control
Circuitry
2
GND
CLK
74.17582418 MHz
27.0000 MHz
MDS 667-01 C
1
Revision 031605
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