ICS501 Datasheet, PDF (1/6 Pages) Integrated Circuit Systems – LOCO PLL CLOCK MULTIPLIER

ICS501
LOCO™ PLL CLOCK MULTIPLIER
Description
The ICS501 LOCO^TM is the most cost effective way to
generate a high-quality, high-frequency clock output
from a lower frequency crystal or clock input. The name
LOCO stands for Low Cost Oscillator, as it is designed
to replace crystal oscillators in most electronic
systems. Using Phase-Locked Loop (PLL) techniques,
the device uses a standard fundamental mode,
inexpensive crystal to produce output clocks up to 160
MHz.
Stored in the chip’s ROM is the ability to generate nine
different multiplication factors, allowing one chip to
output many common frequencies (see table on page
2).
The device also has an output enable pin which
tri-states the clock output when the OE pin is taken low.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed.
For applications which require defined input to output
skew, use the ICS570B.
Features
• Packaged as 8-pin SOIC or die
• Available in Pb (lead) free package
• ICS’ lowest cost PLL clock
• Zero ppm multiplication error
• Input crystal frequency of 5 - 27 MHz
• Input clock frequency of 2 - 50 MHz
• Output clock frequencies up to 160 MHz
• Extremely low jitter of 25 ps (one sigma)
• Compatible with all popular CPUs
• Duty cycle of 45/55 up to 160 MHz
• Nine selectable frequencies
• Operating voltage of 3.3V or 5.5V
• Tri-state output for board level testing
• 25mA drive capability at TTL levels
• Ideal for oscillator replacement
• Industrial temperature version available
• Advanced, low-power CMOS process
Block Diagram
S1:0 ²
Crystal or
Clock input
X1/ICLK
X2
Crystal
O s c illa to r
Optional crystal capacitors
VDD
PLL Clock
M u ltip lie r
Circuitry
and ROM
GND
OE
CLK
MDS 501 K
1
Revision 071304
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