ICS448-16 Datasheet, PDF (1/7 Pages) Integrated Circuit Systems – Networking Clock Synthesizer

ICS448-16
Networking Clock Synthesizer
Description
The ICS448-16 generates four high-quality,
high-frequency clock outputs. It is designed to replace
multiple crystals and crystal oscillators in networking
applications. Using ICS’ patented Phase-Locked Loop
(PLL) techniques, the device runs from a 25 MHz
crystal or clock input.
Features
• Packaged in 16-pin TSSOP
• Replaces multiple crystals and oscillators
• Input crystal or clock frequency of 25 MHz
• Zero ppm frequency synthesis error
• Fixed output frequencies of 25 MHz and 48 MHz
• Selectable output frequencies of 24 MHz, 48 MHz,
50 MHz and 66.6666 MHz
• Duty cycle of 45/55
• Operating voltage of 3.3 V
• Advanced, low power CMOS process
Block Diagram
SEL
X1
25 MHz clock
or crystal input
X2
Crystal
Oscillator/
Clock
Buffer
External capacitors
may be required.
VDD
3
PLL1
PLL2
PLL3
4
GND
CLK1
CLK2
48M
25M
PDTS (all outputs and PLLs)
MDS 448-16 E
1
Revision 031605
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com