AV9170-07 Datasheet, PDF (1/2 Pages) Integrated Circuit Systems – Clock Multiplier

Integrated
Circuit
Systems, Inc.
AV9170-07
Clock Multiplier
General Description
The AV9170-07 is a PLL (Phase-Locked Loop) based
frequency multiplier designed for use on Media Vision sound
boards. This clock output is 4X the input clock, it is restricted
to the output divider and the VCO range. The output frequency
range is 1 to 12.5MHz, with an input range of 0.64 to 0.768MHz
for IN and 0.256 to 3.072MHz for FBIN. By integrating the
sensitive analog sections of the PLL, such as the phase
comparator, loop filter and VCO, jitter is minimized and external
part count is reduced.
Features
• Single chip clock multiplier
• On-chip Phase-Locked Loop
• Low output jitter
• 5 volt only power supply
• Low power CMOS technology
• Small 8-pin DIP or SOIC package
• On-chip loop filter
The AV9170-07 is a derivative of the AV9170 available from
Integrated Circuit Systems, Inc. For additional information
on the AV9170-07, please refer to the AV9170 Application
Note.
Pin Configuration
Pin Descriptions
8-Pin DIP or SOIC J-3, J-6
PIN
NUMBER
1
2
3
4
5
6
7
8
PIN
NAME
FBIN
IN
GND
NC
NC
NC
VDD
CLK
TYPE
DESCRIPTION
Input
Input
-
-
-
-
-
Output
FEEDBACK INPUT for
Phase-Locked Loop.
INPUT for reference clock.
GROUND.
No Connection.
No Connection.
No Connection.
Power Supply (+5V).
CLOCK output.
Block Diagram
AV9170-07RevB060297P
1
ICS reserves the right to make changes in the device data identified in this publication
without further notice. ICS advises its customers to obtain the latest version of all
device data to verify that any information being relied upon by the customer is current
and accurate.