English
Language : 

9DBU0641 Datasheet, PDF (1/17 Pages) Integrated Circuit Systems – slew rate for each output
6 O/P 1.5V PCIe Gen1-2-3 ZDB/FOB
w/Zo=100ohms
9DBU0641
DATASHEET
Description
The 9DBU0641 is a member of IDT's 1.5V Ultra-Low-Power
(ULP) PCIe family. It has integrated output terminations
providing Zo=100 for direct connection to 100
transmission lines. The device has 6 output enables for clock
management and 3 selectable SMBus addresses.
Recommended Application
1.5V PCIe Gen1-2-3 Zero Delay/Fanout Buffer (ZDB/FOB)
Output Features
• 6 – 1-167MHz Low-Power (LP) HCSL DIF pairs
w/Zo=100
Key Specifications
• DIF cycle-to-cycle jitter <50ps
• DIF output-to-output skew <60ps
• DIF phase jitter is PCIe Gen1-2-3 compliant
• DIF bypass mode additive phase jitter is <300fs rms for
PCIe Gen3
• DIF bypass mode additive phase jitter <350fs rms for
12k-20MHz
Block Diagram
vOE(5:0)#
6
Features/Benefits
• Direct connection to 100 transmission lines; saves 24
resistors compared to standard HCSL outputs
• 46mW typical power consumption in PLL mode; eliminates
thermal concerns
• Outputs can optionally be supplied from any voltage
between 1.05 and 1.5V; maximum power savings
• Spread Spectrum (SS) compatible; allows SS for EMI
reduction
• OE# pins; support DIF power management
• HCSL-compatible differential input; can be driven by
common clock sources
• SMBus-selectable features; optimize signal integrity to
application
• slew rate for each output
• differential output amplitude
• Pin/SMBus selectable PLL bandwidth and PLL Bypass;
optimze PLL to application
• Outputs blocked until PLL is locked; clean system start-up
• Device contains default configuration; SMBus interface not
required for device control
• 3.3V tolerant SMBus interface works with legacy controllers
• Three selectable SMBus addresses; multiple devices can
easily share an SMBus segment
• Space saving 40-pin 5x5mm VFQFPN; minimal board
space
CLK_IN
CLK_IN#
vSADR
^vHIBW_BYPM_LOBW#
^CKPWRGD_PD#
SDATA_3.3
SCLK_3.3
SS-
Compatible
PLL
CONTROL
LOGIC
DIF5
DIF4
DIF3
DIF2
DIF1
DIF0
9DBU0641 REVISION C 04/22/15
1
©2015 Integrated Device Technology, Inc.