IC62LV51216L Datasheet, PDF (7/12 Pages) Integrated Circuit Solution Inc – 512 K x 16 bit Low Voltage and Ultra Low Power CMOS Static RAM

IC62LV51216L
IC62LV51216LL
AC TEST LOADS
READ CYCLE NO.1^(1,2) (Address Controlled) (CE1 = OE = VIL, CE2 = VIH, UB or LB = VIL)
ADDRESS
DOUT
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
AC WAVEFORMS
READ CYCLE NO. 2^(1,3) (OE, Controlled)
ADDRESS
OE
CE1
tRC
tAA
tDOE
tLZOE
tOHA
tHZOE
CE2
LB, UB
tLZCE
DOUT
tLZB
HIGH-Z
tACE
tBA
tHZCE
DATA VALID
tHZB
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE1, UB, or LB = VIL, CE2 = VIH
3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.
Integrated Circuit Solution Inc.
7
LPSR014-0C 1/22/2003