IC62LV25616L Datasheet, PDF (6/11 Pages) Integrated Circuit Solution Inc – 256Kx16 bit Low Voltage and Ultra Low Power CMOS Static RAM

IC62LV25616L
IC62LV25616LL
IC62LV25616LL POWER SUPPLY CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
Test Conditions
-55
-70
-100
Min. Max. Min. Max. Min. Max. Unit
ICC
Vcc Dynamic Operating VCC = 3V,
Com. — 25
— 20
— 15
mA
Supply Current
IOUT = 0 mA, f = fMAX
Ind. — 25
— 20
— 15
ISB1
TTL Standby Current
VCC = Max.,
(TTL Inputs)
VIN = VIH or VIL,
CE ≥ VIH, f = 0
Com. — 0.2
Ind. — 0.3
— 0.2
— 0.3
— 0.2 mA
— 0.3
ISB2 CMOS Standby
VCC = Max., f = 0
Com. — 15
— 15
— 15
µA
Current (CMOS Inputs) CE ≥ VCC – 0.2V,
Ind. — 20
— 20
— 20
VIN ≥ VCC – 0.2V or
VIN ≤ 0.2V, f = 0
OR
ULB Control
VCC = Max., VIN≥VCC-0.2V or
VIN ≤ 0.2V, f = 0, UB / LB ≥ VCC – 0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-55
-70
-100
Min. Max.
Min. Max.
Min. Max.
Unit
tRC Read Cycle Time
55 —
70 —
100 —
ns
tAA Address Access Time
— 55
— 70
— 100
ns
tOHA
tACE
tDOE
tHZOE⁽²⁾
tLZOE⁽²⁾
tHZCE⁽²⁾
tLZCE⁽²⁾
tBA
tHZB
tLZB
Output Hold Time
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB o High-Z Output
LB. UB to Low-Z Output
10 —
10 —
15 —
ns
— 55
— 70
— 100
ns
— 30
— 38
— 50
ns
— 20
— 25
— 30
ns
5—
5—
5—
ns
0 20
0 25
0 30
ns
10 —
10 —
10 —
ns
— 55
— 70
— 100
ns
0 25
0 25
0 35
ns
0—
0—
0—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, input pulse levels of 0.4V to 2.2V and output
loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
6
Integrated Circuit Solution Inc.
LPSR013-0D 10/11/2002