IS62LV2568L Datasheet, PDF (5/10 Pages) Integrated Circuit Solution Inc – 256K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM

IS62LV2568L
IS62LV2568LL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
tRC Read Cycle Time
tAA Address Access Time
tOHA Output Hold Time
tACE1 CE1 Access Time
tACE2 CE2 Access Time
tDOE OE Access Time
tLZOE⁽²⁾ OE to Low-Z Output
tHZOE⁽²⁾ OE to High-Z Output
tLZCE1⁽²⁾ CE1 to Low-Z Output
tLZCE2⁽²⁾ CE2 to Low-Z Output
tHZCE⁽²⁾ CE1 or CE2 to Low-Z Output
-55
-70
-100
Min. Max.
Min. Max.
Min. Max.
Unit
55 —
70 —
100 —
ns
— 55
— 70
— 100
ns
10 —
10 —
15 —
ns
— 55
— 70
— 100
ns
— 55
— 70
— 100
ns
— 30
— 35
— 50
ns
5—
5—
5—
ns
— 20
0 25
0 30
ns
10 —
10 —
10 —
ns
10 —
10 —
10 —
ns
0 20
0 25
0 30
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels
of 0.4V to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
OUTPUT
1 TTL
100 pF
Including
jig and
scope
Figure 1
OUTPUT
1 TTL
5 pF
Including
jig and
scope
Figure 2
Integrated Circuit Solution Inc.
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SR025_0C