IC80LV52 Datasheet, PDF (5/22 Pages) Integrated Circuit Solution Inc – CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER

IC80LV52
IC80LV32
Table 1. Detailed Pin Description
Symbol
ALE
PDIP
30
PLCC
33
PQFP I/O
27 I/O
EA
31
35
29
I
P0.0-P0.7 39-32
43-36
37-30 I/O
P1.0-P1.7 1-8
2-9
40-44 I/O
1-3
P2.0-P2.7
1
2
21-28
2
3
24-31
40
I
41
I
18-25 I/O
Name and Function
Address Latch Enable: Output pulse for latching the low byte
of the address during an address to the external memory. In
normal operation, ALE is emitted at a constant rate of 1/6 the
oscillator frequency, and can be used for external timing or
clocking. Note that one ALE pulse is skipped during each
access to external data memory.
External Access enable: EA must be externally held low to
enable the device to fetch code from external program memory
locations 0000H to FFFFH. If EA is held high, the device
executes from internal program memory unless the program
counter contains an address greater than 1FFFH.
Port 0: Port 0 is an 8-bit open-drain, bidirectional I/O port. Port
0 pins that have 1s written to them float and can be used as
high-impedance inputs. Port 0 is also the multiplexed low-order
address and data bus during accesses to external program and
data memory. In this application, it uses strong internal pullups
when emitting 1s.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pullups. Port 1 pins that have 1s written to them are pulled high
by the internal pullups and can be used as inputs. As inputs,
Port 1 pins that are externally pulled low will source current
because of the internal pullups. (See DC Characteristics: IIL).
The Port 1 output buffers can sink/source four TTL inputs.
Port 1 also receives the low-order address byte during ROM
verification.
T2(P1.0): Timer/Counter 2 external count input.
T2EX(P1.1): Timer/Counter 2 trigger input.
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal
pullups. Port 2 pins that have 1s written to them are pulled high
by the internal pullups and can be used as inputs. As inputs,
Port 2 pins that are externally pulled low will source current
because of the internal pullups. (See DC Characteristics: IIL).
Port 2 emits the high order address byte during fetches from
external program memory and during accesses to external
data memory that used 16-bit addresses (MOVX @ DPTR). In
this application, Port 2 uses strong internal pullups when
emitting 1s. During accesses to external data memory that use
8-bit addresses (MOVX @ Ri [i = 0, 1]), Port 2 emits the contents
of the P2 Special Function Register.
Port 2 also receives the high-order bits and some control
signals during ROM verification.
Integrated Circuit Solution Inc.
5
MC006-0B