IC41SV44052 Datasheet, PDF (2/17 Pages) Integrated Circuit Solution Inc – 4Mx4 bit Dynamic RAM with Fast Page Mode

IC41SV44052
IC41SV44054
4M x 4 (16-MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
Preliminary
FEATURES
• Fast Page Mode Access Cycle
• TTL compatible inputs and outputs
• Refresh Interval:
-- 2,048 cycles/32 ms
-- 4,096 cycles/64 ms
• Refresh Mode: RAS-Only,
CAS-before-RAS (CBR), and Hidden
• JEDEC standard pinout
• Single power supply:
1.9V − 2.7V
DESCRIPTION
The ICSI 44052/44054 Series is a 4,194,304 x 4-bit high-
performance CMOS Dynamic Random Access Memory. The
Fast Page Mode allows 2,048 or 4,096 random accesses within
a single row with access cycle time as short as 20 ns per 4-bit
word.
These features make the 44052/44054 Series ideally suited for
digital signal processing, and low power portable audio
applications.
The 44052/44054 Series is packaged in a 26-pin 300mil SOJ
and a 26 pin TSOP-2
KEY TIMING PARAMETERS
Parameter
RAS Access Time (tRAC)
CAS Access Time (tCAC)
Column Address Access Time (tAA)
Fast Page Mode Cycle Time (tPC)
Read/Write Cycle Time (tRC)
-70 -100 Unit
70 100 ns
20 25 ns
35 50 ns
45 60 ns
130 180 ns
PIN CONFIGURATION
24 (26) Pin SOJ, TSOP-2
PIN DESCRIPTIONS
VCC 1
I/O0 2
I/O1 3
WE 4
RAS 5
*A11(NC) 6
A10 7
A0 8
A1 9
A2 10
A3 11
VCC 12
24 GND
23 I/O3
22 I/O2
21 CAS
20 OE
19 A9
18 A8
17 A7
16 A6
15 A5
14 A4
13 GND
A0-A11 Address Inputs (4K Refresh)
A0-A10 Address Inputs (2K Refresh)
I/O0-3 Data Inputs/Outputs
WE
OE
RAS
Write Enable
Output Enable
Row Address Strobe
CAS
Column Address Strobe
Vcc
Power
GND Ground
*A11 is NC for 2K Refresh devices.
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
DR035-0B 7/31/2002