IC41C16100S Datasheet, PDF (2/21 Pages) Integrated Circuit Solution Inc – 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

IC41C16100S
IC41LV16100S
1M x 16 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
FEATURES
• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval:
Refresh Mode: 1,024 cycles /16 ms
RAS-Only, CAS-before-RAS (CBR), and Hidden
Self refresh Mode - 1,024 cycles / 128ms
• JEDEC standard pinout
DESCRIPTION
The ICSI IC41C16100S and IC41LV16100S are 1,048,576 x
16-bit high-performance CMOS Dynamic Random Access
Memories. These devices offer an accelerated cycle access
called EDO Page Mode. EDO Page Mode allows 1,024 ran-
dom accesses within a single row with access cycle time as
short as 20 ns per 16-bit word. The Byte Write control, of upper
and lower byte, makes the IC41C16100S ideal for use in
16-, 32-bit wide data bus systems.
• Single power supply:
5V ± 10% (IC41C16100S)
3.3V ± 10% (IC41LV16100S)
• Byte Write and Byte Read operation via two CAS
These features make the IC41C16100Sand IC41LV16100S
ideally suited for high-bandwidth graphics, digital signal
processing, high-performance computing systems, and
peripheral applications.
• Industrail Temperature Range -40°C to 85°C
KEY TIMING PARAMETERS
The IC41C16100S and IC41LV16100S are packaged in a
42-pin 400mil SOJ and 400mil 50- (44-) pin TSOP-2.
Parameter
-45
-50
-60
Unit
Max. RAS Access Time (tRAC)
45
50
60
ns
Max. CAS Access Time (tCAC)
11
13
15
ns
Max. Column Address Access Time (tAA)
22
25
30
ns
Min. EDO Page Mode Cycle Time (tPC)
16
20
25
ns
Min. Read/Write Cycle Time (tRC)
77
84
104
ns
PIN CONFIGURATIONS
50(44)-Pin TSOP II
VCC 1
I/O0 2
I/O1 3
I/O2 4
I/O3 5
VCC 6
I/O4 7
I/O5 8
I/O6 9
I/O7 10
NC 11
NC 15
NC 16
WE 17
RAS 18
NC 19
NC 20
A0 21
A1 22
A2 23
A3 24
VCC 25
50 GND
49 I/O15
48 I/O14
47 I/O13
46 I/O12
45 GND
44 I/O11
43 I/O10
42 I/O9
41 I/O8
40 NC
36 NC
35 LCAS
34 UCAS
33 OE
32 A9
31 A8
30 A7
29 A6
28 A5
27 A4
26 GND
42-Pin SOJ
VCC 1
I/O0 2
I/O1 3
I/O2 4
I/O3 5
VCC 6
I/O4 7
I/O5 8
I/O6 9
I/O7 10
NC 11
NC 12
WE 13
RAS 14
NC 15
NC 16
A0 17
A1 18
A2 19
A3 20
VCC 21
42 GND
41 I/O15
40 I/O14
39 I/O13
38 I/O12
37 GND
36 I/O11
35 I/O10
34 I/O9
33 I/O8
32 NC
31 LCAS
30 UCAS
29 OE
28 A9
27 A8
26 A7
25 A6
24 A5
23 A4
22 GND
PIN DESCRIPTIONS
A0-A9
I/O0-15
WE
OE
RAS
UCAS
LCAS
Vcc
GND
NC
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
Power
Ground
No Connection
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
DR010-0D 11/26/2004