ICS9214_07 Datasheet, PDF (16/16 Pages) Integrated Circuit Solution Inc – RambusTM XDRTM Clock Generator

Integrated
Circuit
Systems, Inc.
ICS9214
Revision History
Rev. Issue Date Description
Updated SMBus table Byte 2, Bit 3 from:0 to:1.
0.1
03/30/05 ^{Updated PLL Multiplier Selection Table, from: Byte 1 to: Byte 0, and Bit 2,1,0,}
to: Bit 6,5,4.
Updated Ordering Information from "Lead Free" to "Annealed Lead Free"
Added Phase noise spec
Removed unsupported speeds from PLL Multiplier Selection,
Changed minimum output raise, fall times from 140ps to 100 ps
A
04/06/05 _{Compliant with Rev 0.81 of XCG spec.}
1. Changed write address from D2 to a valid address (D8)
B
04/22/05 2. Changed read address from D3 to a valid address (D9)
C
11/11/05 Added the 15/4 entry in the gear table to the list of supported frequencies
D
04/07/06 Added Thermal Characteristics Table.
E
11/17/06 Updated Pin Description.
F
11/05/07 Updated to extended temperature range
Page #
4-5,15
Various
3
5
10
2
-
0809F—11/05/07
16