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ICS950220AFLFT Datasheet, PDF (1/20 Pages) Integrated Circuit Solution Inc – Programmable Timing Control Hub™ for P4™
Integrated
Circuit
Systems, Inc.
ICS950220
Programmable Timing Control Hub™ for P4™
Recommended Application:
CK-408 clock for Intel® 845 chipset.
Output Features:
• 3 - Pairs of differential CPU clocks @ 3.3V
• 3 - 3V66 @ 3.3V
• 9 - PCI @ 3.3V
• 2 - 48MHz @ 3.3V fixed
• 1 - 24_48MHz @ 3.3V, 48MHz, 24Mhz or 66MHz
• 1 - REF @ 3.3V, 14.318MHz
Features/Benefits:
• Programmable output frequency.
• Programmable output divider ratios.
• Programmable output rise/fall time.
• Programmable output skew.
• Programmable spread percentage for EMI control.
• Watchdog timer technology to reset system
if system malfunctions.
• Programmable watch dog safe frequency.
• Support I2C Index read/write and block read/write
operations.
• Uses external 14.318MHz crystal.
Key Specifications:
• CPU Output Jitter <150ps
• 3V66 Output Jitter <250ps
• CPU Output Skew <100ps
Pin Configuration
VDDREF 1
X1 2
X2 3
GND 4
1*FS0/PCICLK7
5
1**FS1/PCICLK8
6
VDDPCI 7
GND 8
1*WDEN/PCICLK0
9
PCICLK1 10
PCICLK2 11
PCICLK3 12
VDDPCI 13
GND 14
PCICLK4 15
PCICLK5 16
PCICLK6 17
VDD3V66 18
GND 19
3V66_1 20
3V66_2 21
3V66_3 22
#RESET 23
VDDA 24
48 REF/FS2**1
47 CPUCLKT0
46 CPUCLKC0
45 VDDCPU
44 CPUCLKT1
43 CPUCLKC1
42 GND
41 VDDCPU
40 CPUCLKT2
39 CPUCLKC2
38 MULTISEL0*
37 I REF
36 GND
35 48MHz_USB/FS3**
34 48MHz_DOT/SEL_24_48*
33 AVDD48
32 GND
31 3V66_0/24_48MHZ#/FS4**
30 VDD3V66
29 GND
28 SCLK
27 SDATA
26 Vtt_PWRGD/PD#*
25 GND
48-Pin 300-mil SSOP
1. These outputs have 2X drive strength.
* Internal Pull-up resistor of 120K to VDD
** these inputs have 120K internal pull-down
to GND
Block Diagram
Frequency Table
PLL2
X1
XTAL
X2
OSC
PLL1
Spread
Spectrum
SEL24_48
WDEN
MULTSEL0
FS (4:0)
SDATA
SCLK
Vtt_PWRGD#
PD#
Control
Logic
Config.
Reg.
/2
3V66
DIVDER
CPU
DIVDER
PCI
DIVDER
48MHz_USB
48MHz_DOT
3V66 (3:1)
3
3V66_0/24_48MHZ#
REF
3 CPUCLKT (2:0)
3 CPUCLKC (2:0)
PCICLK (6:0)
7
Reset#
I REF
FS4
FS3
FS2
FS1
FS0
CPUCLK
MHz
3V66
MHz
PCICLK
MHz
0 0 0 0 1 100.00 66.67 33.33
1 0 0 0 1 133.33 66.67 33.33
1 1 1 1 0 66.67 66.67 33.34
1 1 1 1 1 200.00 66.67 33.33
For additional frequency selections please refer to Byte 0.
Power Groups
VDDA = Analog Core PLL
VDDREF = REF, Xtal
AVDD48 = 48MHz
0467G—03/02/07