IC62LV2568L Datasheet, PDF (1/10 Pages) Integrated Circuit Solution Inc – 256K x 8 LOW POWER AND LOW Vcc CMOS STATIC RAM

I_IC_C62₆LV₂2_L5_V68₂L _568L
I_IC_C62₆LV₂2_L5_V68₂LL_568LL
256K x 8 LOW POWER and LOW V++
CMOS STATIC RAM
.EATURES
• Access times of 55, 70, 100 ns
• Low active power: 126 mW (max, L, LL)
• Low standby power: 36 µW (max, L) and 7.2
µW (max, LL) CMOS standby
• Low data retention voltage: 1.5V (min.)
• Available in Low Power (-L) and Ultra-Low
Power (-LL)
• Output Enable (OE) and two Chip Enable
• TTL compatible inputs and outputs
• Single 2.7V-3.6V power supply
• Available in the 32-pin 8x20mm TSOP-1, 32-pin
8x13.4mm TSOP-1 and 48-pin 6*8mm T.-BGA
DESCRIPTION
The 1+51 IC62LV2568L and IC62LV2568LL are low power
and low VCC, 262,144-bit words by 8 bits CMOS static RAMs.
They are fabricated using 1+51's high-performance CMOS
technology. This highly reliable process coupled with innova-
tive circuit design techniques, yields higher performance and
low power consumption devices.
When CE1 is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable
inputs, CE1 and CE2. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IC62LV2568L and IC62LV2568LL are available in 32-pin
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm T.-
BGA.
.UNCTIONAL BLOCK DIAGRAM
A0-A17
VCC
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
2048 x 128 x 8
MEMORY ARRAY
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
1
LPSR001-0A 05/01/2001