ICM7372 Datasheet, PDF (4/11 Pages) IC MICROSYSTEMS – DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS with Serial Interface and Adjustable Output Offset

ICmic
IC MICROSYSTEMS
Symbol
Parameter
OUTPUT CHARACTERISTICS
Output Voltage Range
VO_SC
Short Circuit Current
R_OUT
Amp Output Impedance
Output Line Regulation
LOGIC INPUTS
V_IH
Digital Input High
V_IL
Digital Input Low
Digital Input Leakage
REFERENCE
V_REFOUT
Reference Output
Reference Output Line
Regulation
ICM7372/7352/7332
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
with Serial Interface and Adjustable Output Offset
Test Conditions
Min
Typ.
Max
Unit
(Note 3)
At Mid-scale (Note 2)
At 0-scale (Note 2)
V_DD=2.7 to 5.5 V
(Note 2)
(Note 2)
0
VDD
V
60
150
mA
1.0
5.0
Ω
100
200
Ω
0.4
3.0
mV/V
2.4
V
0.8
V
5
µΑ
1.2
1.25 1.3
V
0.8
4.0
mV/V
AC ELECTRICAL CHARACTERISTICS
(V_DD = 2.7V to 5.5V, VOUT unloaded; all specifications T_MIN to T_MAX unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
SR
Slew Rate
Settling Time
Mid-scale Transition Glitch
Energy
Full-scale settling
Typ.
2
8
40
Max
Unit
V/µs
µs
nV-S
Note 1:
Note 2:
Note 3:
Note 4:
Linearity is defined from code 64 to 4095 (ICM7372)
Linearity is defined from code 16 to 1023 (ICM7352)
Linearity is defined from code 4 to 255 (ICM7332)
Guaranteed by design; not tested in production
See Applications Information
All digital Inputs at GND or VDD
TIMING CHARACTERISTICS
(V_DD = 2.7V to 5.5V, all specifications T_MIN to T_MAX unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
t₁
SCK Cycle Time
(Note 2)
30
ns
t₂
Data Setup Time
(Note 2)
10
ns
t₃
Data Hold Time
(Note 2)
10
ns
t₄
SCK Falling edge to CS Rising Edge (Note 2)
0
ns
t₅
CS Falling Edge to SCK Rising Edge (Note 2)
15
ns
t₆
CS Pulse Width
(Note 2)
20
ns
t₇
SDO Delay
(Note 2)
100
ns
Rev. A10
ICmic reserves the right to change the specifications without prior notice.
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