X76F102 Datasheet, PDF (2/18 Pages) Xicor Inc. – The X76F102 is a Password Access Security Supervisor, containing one 896-bit Secure SerialFlash array

X76F102
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the
device.
Serial Data (SDA)
SDA is an open drain serial data input/output pin. During
a read cycle, data is shifted out on this pin. During a write
cycle, data is shifted in on this pin. In all other cases, this
pin is in a high impedance state.
Reset (RST)
RST is a device reset pin. When RST is pulsed high the
X76F102 will output 32 bits of fixed data which conforms
to the standard for “synchronous response to reset”. The
part must not be in a write cycle for the response to reset
to occur. See Figure 7. If there is power interrupted dur-
ing the Response to Reset, the response to reset will be
aborted and the part will return to the standby state. The
response to reset is "mask programmable" only!
The basic sequence is illustrated in Figure 1.
DEVICE OPERATION
The X76F102 memory array consists of fourteen 8-byte
sectors. Read or write access to the array always begins
at the first address of the sector. Read operations then
can continue indefinitely. Write operations must total 8
bytes.
There are two primary modes of operation for the
X76F102; Protected READ and protected WRITE. Pro-
tected operations must be performed with one of two
8-byte passwords.
The basic method of communication for the device is
generating a start condition, then transmitting a com-
mand, followed by the correct password. All parts will be
shipped from the factory with all passwords equal to ‘0’.
The user must perform ACK Polling to determine the
validity of the password, before starting a data transfer
(see Acknowledge Polling.) Only after the correct pass-
word is accepted and a ACK polling has been performed,
can the data transfer occur.
To ensure the correct communication, RST must remain
LOW under all conditions except when running a
“Response to Reset sequence”.
Data is transferred in 8-bit segments, with each transfer
being followed by an ACK, generated by the receiving
device.
If the X76F102 is in a nonvolatile write cycle a “no ACK”
(SDA=High) response will be issued in response to load-
ing of the command byte. If a stop is issued prior to the
nonvolatile write cycle the write operation will be termi-
nated and the part will reset and enter into a standby
mode.
PIN NAMES
Symbol
SDA
SCL
RST
Vcc
Vss
NC
Description
Serial Data Input/Output
Serial Clock Input
Reset Input
Supply Voltage
Ground
No Connect
PIN CONFIGURATION
V_CC
NC
NC
Vss
PDIP
1
8
2
7
3
6
4
5
RST
SCL
SDA
NC
V_SS
NC
SDA
NC
SOIC
1
8
2
7
3
6
4
5
V_CC
RST
SCL
NC
V_SS
NC
NC
SDA
MSOP
1
8
2
7
3
6
4
5
V_CC
NC
RST
SCL
Smart Card Module
V_CC
RST
GND
NC
SCL
SDA
NC
NC
V_CC
NC
NC
V_SS
TSSOP
1
8
2
7
3
6
4
5
SCL
RST
SDA
NC
2