X25650 Datasheet, PDF (1/14 Pages) Xicor Inc. – 5MHz SPI Serial E 2 PROM with Block Lock TM Protection

This X25650 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
ICmic^TM
IC MICROSYSTEMS
64K
X25650
8K x 8 Bit
5MHz SPI Serial E²PROM with Block Lock^TM Protection
FEATURES
•5MHz Clock Rate
•Low Power CMOS
<1µA Standby Current
<5mA Active Current
•2.5V To 5.5V Power Supply
•SPI Modes (0,0 & 1,1)
•8K X 8 Bits
32 Byte Page Mode
•Block Lock™ Protection
Protect 1/4, 1/2 or all of E²PROM Array
•Programmable Hardware Write Protection
In-Circuit Programmable ROM Mode
•Built-in Inadvertent Write Protection
Power-Up/Down protection circuitry
Write Enable Latch
Write Protect Pin
•Self-Timed Write Cycle
5ms Write Cycle Time (Typical)
•High Reliability
Endurance: 100,000 cycles
Data Retention: 100 Years
ESD protection: 2000V on all pins
•Packages
8-Lead SOIC
20-Lead TSSOP
FUNCTIONAL DIAGRAM
STATUS
REGISTER
WRITE
PROTECT
LOGIC
SO
SI
SCK
CS
HOLD
COMMAND
DECODE
AND
CONTROL
LOGIC
DESCRIPTION
The X25650 is a CMOS 65,536-bit serial E²PROM,
internally organized as 8K x 8. The X25650 features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25650 also features two additional inputs that
provide the end user with added flexibility. By
asserting the HOLD input, the X25650 will ignore tran-
sitions on its inputs, thus allowing the host to service
higher priority interrupts. The WP input can be used as a
hardwire input to the X25650 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25650 utilizes Xicor’s proprietary Direct Write^TM cell,
providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
X DECODE
LOGIC
64
64
128
8K BYTE
ARRAY
64 X 256
64 X 256
128 X 256
WRITE
CONTROL
AND
WP
TIMING
LOGIC
Direct Write^TM and Block Lock^TM Protection is a trademark of Xicor, Inc.
©Xicor, Inc. 1994, 1995, 1996 Patents Pending
1
7037–1.5 6/19/97 T1/C0/D0 SH
32
8
Y DECODE
DATA REGISTER
7037 FRM F01
Characteristics subject to change without notice