IC-MH8_11 Datasheet, PDF (6/25 Pages) IC-Haus GmbH – 12 BIT ANGULAR HALL ENCODER

iC-MH8
12 BIT ANGULAR HALL ENCODER
preliminary
Rev A0.9, Page 6/25
ELECTRICAL CHARACTERISTICS
Operating conditions:
VPA, VPD = 5 V ±10 %, VNA=VND, Tj = -40...125 °C, IBM adjusted to 200 µA , 4 mm NdFeB magnet, unless otherwise noted
Item Symbol Parameter
No.
Conditions
Min. Typ. Max.
407 Vosr
Reference voltage offset com-
pensation
475 500 525
Clock Generation
501 f()sys
System Clock
Bias Current adjusted
0.85 1.0 1.2
502 f()sdc
Sinus/Digital-Converter Clock Bias Current adjusted
13.5 16
18
Sin/Digital Converter
601 RESsdc Sinus/Digital-Converter Resolu-
12
tion
602 AAabs Absolute Angular Accuracy
Vpp() = 4 V, adjusted
-0.35
0.35
603 AArel
Relative Angular Accuracy
with reference to an output periode at A, B.
CFGRES=0x2, ENF=1, PRM=0, HCLH=1,
GAING=0x0, Vpp(SIN/COS) = 4 Vpp.
see Fig. 17
± 10
604 f()ab
Output frequency at A, B
CFGMTD = 0x0, CFGRES=0x0
2.0
CFGMTD = 0x7, CFGRES=0x0
0.25
Serial Interface, Digital Outputs MA, SLO, SLI
701 Vs(SLO)hi Saturation Voltage High
V(SLO) = V(VPD) − V(),
0.4
I(SLO) = 4 mA
702 Vs(SLO)lo Saturation Voltage Low
I(SLO) = 4 mA to VND
0.4
703 Isc(SLO)hi Short-Circuit Current High
V(SLO) = V(VND), 25°C
-90 -50
704 Isc(SLO)lo Short-Circuit Current Low
V(SLO) = V(VPD), 25°C
50
80
705 tr(SLO) Rise Time SLO
CL = 50 pF
60
706 tf(SLO) Fall Time SLO
CL = 50 pF
60
707 Vt()hi
Threshold Voltage High: MA, SLI
2
708 Vt()lo
Threshold Voltage Low: MA, SLI
0.8
709 Vt()hys Threshold Hysteresis: MA, SLI
140 250
710 Ipd()
Pull-Down Current: MA, SLI
V() = 0...VPD − 1 V
6
30
60
711 Ipu(MA)
-60 -30
-6
712 f(MA)
10
Zapping and Test
801 Vt()hi
Threshold Voltage High VZAP, with reference to VND
2
PTE
802 Vt()lo
Threshold Voltage Low VZAP, with reference to VND
0.8
PTE
803 Vt()hys Hysteresis
Vt()hys = Vt()hi − Vt()lo
140 250
804 Vt()nozap Threshold Voltage Nozap VZAP V() = V(VZAP) − V(VPA), V(VPA) = 5 V ±5 %, 0.7
at chip temperature 27 °C
805 Vt()zap Threshold Voltage Zap VZAP V() = V(VZAP) − V(VPA), V(VPA) = 5 V ±5 %,
1.2
at chip temperature 27 °C
806 V()zap Zapping voltage
PROG = ’1’
6.9 7.0 7.1
807 V()zpd Diode voltage, zapped
2
808 V()uzpd Diode voltage, unzapped
3
809 Rpd()VZAP Pull-Down Resistor at VZAP
30
55
NERR Output
901 Vt()hi
Input Threshold Voltage High with reference to VND
2
902 Vs()lo
Saturation Voltage Low
I() = 4 mA , with reference to VND
0.4
903 Vt()lo
Input Threshold Voltage Low
with reference to VND
0.8
904 Vt()hys Input Hysteresis
Vt()hys = Vt()hi − Vt()lo
140 250
905 Ipu()
Pull-up Current Source
V(NERR) = 0...VPD − 1 V
-800 -300 -80
906 Isc()lo
Short circuit current Lo
V(NERR) = V(VPD), Tj = 25°C
50
80
907 tf()hilo
Decay time
CL = 50 pF
60
Unit
mV
MHz
MHz
Bit
Deg
%
MHz
MHz
V
V
mA
mA
ns
ns
V
V
mV
µA
µA
MHz
V
V
mV
V
V
V
V
V
kΩ
V
V
V
mV
µA
mA
ns