IC-HV Datasheet, PDF (4/8 Pages) IC-Haus GmbH – VCSEL ARRAY DRIVER

iC-HV
VCSEL ARRAY DRIVER
preliminary
Rev A1, Page 4/8
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 3.0...5.5 V, Tj = -40...125 °C unless otherwise stated
Item Symbol Parameter
No.
Conditions
Total Device (x = 1. . . 3)
001 VDD
Permissible Supply Voltage
002 I(VDD) Supply Current in VDD
CW operation
003 I(VDD) Supply Current in VDD
pulsed operation, f(EPx,ENx) = 200 MHz, all
switches
004 VLDA
Permissible Voltage at VLDA
005 V(NER) Permissible Voltage at NER
006 Vc(CIx)hi Clamp Voltage hi at CIx
Vc(CIx) = V(CIx) − VDD;
I(CI) = 10 mA, other pins open
007 Vc()hi
Clamp Voltage hi at EPx, ENx, Vc() = V() − VDD;
ELVDS
I() = 1 mA, other pins open
008 Vc()lo
Clamp Voltage lo at VDD, VLDA, I() = -10 mA, other pins open
CIx, EPx, ENx, ELVDS, NER,
VTEMP
Current Control LDK, CI1. . . 3 (x = 1. . . 3)
101 Icw(LDK) Permissible CW Current in LDK
(per switch)
102 Vs(LDK) Saturation Voltage at LDK
I(LDK) = 900 mA,
V(CIx) = V(CIx)@I(LDK) = 1000 mA
103 I0(LDKx) Leakage Current in LDK
EPx = lo, V(LDK), V(VLDA) = 5.5 V
104 tr()
LDK Current Rise Time
Iop(LDK) = 1000 mA, I(LDK): 10% → 90% Iop,
V(ELVDS) = 0 V or VDD
105 tf()
LDKx Current Fall Time
Iop(LDK) = 1000 mA, I(LDK): 90% → 10% Iop,
V(ELVDS) = 0 V or VDD
106 tp()
Propagation Delay
V(EPx) → I(LDK)
V(ELVDS) = 0 V or VDD, Differential LVDS Rise
and Fall Time < 0.5 ns
107 CR()
Current Matching all switches
108 V(CIx)
Permissible Voltage at CIx
109 Vt(CIx) Threshold Voltage at CIx
I(LDKx) < 5 mA
110 V(CIx)
Operating Voltage at CIx
I(LDK) = 1000 mA, V(LDK) > 1.8 V
111 Ipd(CIx) Pull-Down Current at CIx
V(CIx) = 0.5. . . 5.5 V
112 C(CIx) Capacity at CIx
V(CIx) = 2 V
113 tskc()
Switch to Switch Skew
Input EP1. . . 3, EN1. . . 3 (x = 1. . . 3)
201 Vt(TTL)hi Input Threshold Voltage hi
V(ELVDS) < 20% VDD, TTL
202 Vt(TTL)lo Input Threshold Voltage lo
V(ELVDS) < 20% VDD, TTL
203 Vhys(TTL) Hysteresis
Vhys() = Vt()hi − Vt()lo;
V(ELVDS) < 20% VDD, TTL
204 R(EPx) Pull-Down Resistor
V(ELVDS) < 20% VDD, TTL
205 R(ENx) Pull-Down Resistor
V(ELVDS) < 20% VDD, TTL
206 V(EPx) Voltage at EPx
V(ELVDS) > 80% VDD, LVDS, EPx, ENx open
207 V(ENx) Voltage at ENx
V(ELVDS) > 80% VDD, LVDS, EPx, ENx open
208 Ri(EPx) Resistor at ENx
V(ELVDS) > 80% VDD, LVDS, EPx, ENx open
209 Ri(ENx) Resistor at ENx
V(ELVDS) > 80% VDD, LVDS, EPx, ENx open
210 Vdiff
Differential Voltage
Vdiff = |V(EPx) − V(ENx)|;
V(ELVDS) > 80% VDD, LVDS
211 V()
Input Voltage Range
V(ELVDS) > 80% VDD, LVDS
Min.
3
-0.3
-0.3
0.3
0.8
-1.6
3
0.9
-0.3
0.4
1
270
0.8
50
100
170
31
40
75
80
200
-0.2
Input ELVDS
301 V(ELVDS) Voltage at ELVDS
ELVDS open
48
302 Ri(ELVDS)
35
Unit
Typ. Max.
5.5
V
25
mA
700 mA
5.5
V
5.5
V
1.6
V
3
V
-0.3
V
1000 mA
1.5
V
600 µA
1
ns
1
ns
5
14
ns
1.1
VDD
V
1.2
V
2
2.9
V
2.5
5
µA
350 460 pF
160^∗
ps
2
V
V
mV
162 220 kΩ
282 390 kΩ
33
35 %VDD
42
44 %VDD
109 155 kΩ
119 170 kΩ
mV
VDD + V
0.2
50
52 %VDD
50
70
kΩ
∗ _{Projected values by simulation}