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IC-NQC Datasheet, PDF (17/29 Pages) IC-Haus GmbH – 13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
iC-NQC
preliminary
13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
Rev B1, Page 17/29
SIGNAL MONITORING and ERROR MESSAGES
SELAMPL
AMPL
Code
0x00
0x01
0x02
0x03
Code
0x04
0x05
0x06
0x07
Notes
Adr 0x0C, Bit 2
Adr 0x0C, Bit 1:0
Max ( |Sin| , |Cos| )
Voltage threshold Vth
Output amplitude*
0.60 x VDDA
1.4 Vpp
0.64 x VDDA
2.0 Vpp
0.68 x VDDA
2.6 Vpp
0.72 x VDDA
Sin2 + Cos2
3.1 Vpp
Vthmin ↔ Vthmax
Output amplitude*
0.20 ↔ 0.9 x VDDA
1.0 Vpp ↔ 4.5 Vpp
0.30 ↔ 0.9 x VDDA
1.5 Vpp ↔ 4.5 Vpp
0.40 ↔ 0.9 x VDDA
2.0 Vpp ↔ 4.5 Vpp
0.50 ↔ 0.9 x VDDA
2.5 Vpp ↔ 4.5 Vpp
*) Entries are calculated with VDDA = 5 V.
Table 25: Signal amplitude monitoring
Vss
Vth
Figure 13: Signal monitoring at minimum amplitude.
Vthmax
Vthmin
Figure 14: Sin2 + Cos2 signal monitoring.
AERR
Code
0x00
0x01
Adr 0x03, Bit 1
Amplitude error message
disabled
enabled
Table 26: Amplitude error
FERR
Code
0x00
0x01
Notes
Adr 0x03, Bit 0
Excessive frequency error message
disabled
enabled
Input frequency monitoring is operational for
resolutions ≥ 16
Table 27: Frequency error
Configuration error
-
Always enabled
Table 28: Configuration error
Error Indication at NERR
Failure Mode
Pin signal NERR
No error
HI
Amplitude error LO/HI = 75 % (resp. HI for AERR = 0)
Frequency error LO/HI = 50 % (resp. HI for FERR = 0)
Configuration
LO
Undervoltage
LO
System error
NERR = low caused by an external error
signal
Table 29: Error indication at NERR
Error Messages
Failure Mode
No error
Amplitude error
Frequency error
System error*
Warning**
Notes
*System error
**Warning
Line Signal SLO
Error bits E1, E0
for BiSS and SSI
CRC6 = 0
1, 1
0, 1
1, 0
0, 0
—
Error bits nE, nW
for BiSS and SSI
CRC6 = 1
1, nW
0, nW
0, nW
0, nW
nE, 0
NERR pulled low by external signal
Automatic step-back of resolution
Data output is deactivated and SLO
permanently high in case of: configuration
phase, invalid configuration, undervoltage.
Table 30: Error messages
To enable the diagnosis of faults, the various types
of error are signaled at NERR using a PWM code as
given in the key on the left.
Two error bits are provided to enable communication
via the I/O interface; these bits can decode four differ-
ent types of error. If NERR is held at low by an external
source, such as an error message from the system, for
example, this can also be verified via the I/O interface.
Error are stored until the sensor data is output via the
I/O interface and then deleted. Errors at NERR are
displayed for a minimum of ca. 10 ms unless they are
deleted beforehand by a data output.