IC-JJ Datasheet, PDF (10/17 Pages) IC-Haus GmbH – POWER MANAGEMENT iC

iC-JJ
POWER MANAGEMENT IC
Rev A1, Page 10/17
ELECTRICAL CHARACTERISTICS
Operating conditions: +VBAT= 6..16.5V, PGND= GND, COS= 680pF,
RSET= 10kS, RKL= 511S, RKLR= 511S, Tj= -40..125EC, unless otherwise noted
Item Symbol Parameter
Conditions
Tj Fig.
EC
Boost Converter (continued)
A15 Ipu(VA1x) Pull-Up Current in VA1x
V(VA1x) < 1V
27
A16 Vr(VA1x) Transformation Ratio with
external Voltage Divider
R(VA1/VA1x) / R(VA1x/AGND)
V(VA1)= (1+R(VA1/VA1x) /
R(VA1x/AGND)) × V(VBG),
R(VA1x/AGND)= 1..5k,
V(VA1)= V(VB)..48V
K-Interface
B01 Vs(K) Saturation Voltage at K
I(K)= 15.7mA, TXD= lo, T < Tab
B02 Vs(K) Saturation Voltage at K
I(K)= 32.4mA, TXD= lo, T < Tab
B03 Isc(K) Short-circuit Current in K
V(K)= 2..27V,
TXD= lo, t < 100ms
27
B04 C(K)
Permissible Input Capacitance K
B05 Ipu(K) Pull-Up Current in K
V(KL, KLR)= 8..16.5V,
V(K)= 0.2V..V(KL, KLR)-1V
V(VA1) > V(VM) + 2V, TXD= hi
B06 Vt(K)
Switching Threshold at K related V(KL, KLR)= 6..16.5V, TXD= hi
to Maximum V(KL, KLR)
B07 Vt(K) Switching Threshold at K during V(KL, KLR) < 5.5V
Autarky
27
B08 Vhys(K) Hysteresis at K
B09 tf(K)
Fall Time at K
V(KL, KLR)= 6..16.5V or Autarky
R(KLR/K)= 511S, CK < 5nF, V(K)
from hi= 80% 6 lo= 20% V(KLR),
TXD from hi to lo
B10 In(K)
Current in K
V(K)= -3V, TXD= hi
B11 Ilk(K) Leakage Current in K
V(K) > KL, KLR, TXD = hi,
V(K) < 27V, VM, VMR > 0V
B12 Vf(K) Free-wheeling Voltage at K
I(K)= 10mA, TXD= hi
B13 Vpu(K)
B14 tp(K)
B15 tp(K)
B16 dtp(K)
B17 tf(K)
Pull-up Current at K against
V(VM, VMR)
Transmission Delay K 6 RXD
Transmission Delay TXD6K
Transmission Delay Difference
K 6 RXD, K lo 6 hi to K hi 6 lo
Fall Time at K
I(K)= -20µA, TXD= hi,
V(VM), V(VMR)= 8..16.5V
V(VA1) > V(VM) + 2V
f # 200kHz, V(K) from
25% 6 75% V(VM, VMR)
f # 200kHz, V(K) from
75% 6 25% V(VM, VMR)
f # 200kHz, V(K) from
25% 6 75% V(VM, VMR)
R(KLR/K)= 511S,, CK< 10nF,
V(K) from hi= 80% 6 lo= 20%
V(KLR), TXD from hi to lo
Watchdog
C01 tl(NRES) Reset Pulse Width lo at NRES triggered by watchdog
C02 Tu(TWD) Lower TWD Period for Reset
27
C03 To(TWD) Upper TWD Period for Reset
27
C04 tp(TWD) Permissible Pulse Width at TWD TWD detection at lo pulse
Min.
-25
2
-80
45
54
50
-8
-20
48
-0.3
6.5
404
652
18
Unit
Typ. Max.
-1
µA
-5
µA
18
1.4
V
1.7
V
150 mA
60
mA
25
pF
-20
µA
55
%
66 %VCC
60
%VCC
300 mV
2
µs
mA
20
µA
V
0.3
V
6
2
µs
4
2
µs
1
µs
1
µs
8.9
µs
558
µs
480
µs
885 ms
770
ms
649.9 ms