HYMD212G726BS4M-M Datasheet, PDF (9/17 Pages) Hynix Semiconductor – Low Profile Registered DDR SDRAM DIMM

HYMD212G726B(L)S4M-M/K/H/L
DC CHARACTERISTICS II (TA=0 to 70^oC, Voltage referenced to VSS=0V)
Parameter
Symbol
Test Condition
Speed
Unit Note
-M -K -H -L
Operating Current
IDD0
One bank; Active - Precharge; tRC=tRC(min);
tCK= tCK(min); DQ,DM and DQS inputs changing
twice per clock cycle; address and control inputs
3530
3290
3290
3050
mA
changing once per clock cycle
Operating Current
IDD1
One bank; Active - Read - Precharge; Burst
Length =2; tRC=tRC(min); tCK=tCK(min);
address and control inputs changing once per
clock cycle
3530 3290 3290 3050 mA
Precharge Power
Down Standby Current
All banks idle; Power down mode; CKE=Low,
IDD2P _tCK=tCK(min)
970
mA
Idle Standby Current
/CS=High, All banks idle; tCK=tCK(min); CKE=
IDD2F High; address and control inputs changing once 2250 2090 2090 1930 mA
per clock cycle. VIN=VREF for DQ, DQS, and DM
Active Power Down
Standby Current
IDD3P
One bank active; Power down mode; CKE=Low,
tCK=tCK(min)
1130
mA
Active Standby Current
/CS=HIGH, CKE=HIGH; One bank; Active-
Precharge; tRC=tRAS(max); tCK=tCK(min); DQ,
IDD3N DM and DQS inputs changing twice per clock
2570 2410 2410 2250 mA
cycle; Address and other control inputs changing
once per clock cycle
Operating Current
IDD4R
Burst=2; Reads; Continuous burst; One bank
active; Address and control inputs changing once 4330 3930 3930 3690
per clock cycle; tCK=tCK(min); IOUT=0mA
Operating Current
Burst=2; Writes; Continuous burst; One bank
IDD4W
active; Address and control inputs changing once
per clock cycle; tCK=tCK(min); DQ, DM, and DQS
6770
5870
5870
4790
mA
inputs changing twice per clock cycle
Auto Refresh Current
IDD5
tRC=tRFC(min) - 8*tCK for DDR200 at 100Mhz,
10*tCK for DDR266A & DDR266B at 133Mhz;
distributed refresh
4190 3950 3950 3710
Normal
446
mA
Self Refresh Current
IDD6
CKE=<0.2V; External clock on;
tCK =tCK(min)
Low Power
398
mA
Operating Current -
Four Bank Operation
Four bank interleaving with BL=4 Refer to the
IDD7 _{following page for detailed test condition}
5630 5390 5390 5150 mA
Rev. 0.1 / Dec. 2003
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